Abstract:
A multilayer circuit board having strengthened air bridge crossover structures, and additive and subtractive methods for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit. A preferred embodiment includes air bridge structures having generally T-shaped cross-sections, which provide strengthened, mechanically robust air bridges which are especially resistant to damage from flexure and displacement due to physical impact, bending, thermal excursions, and the like.
Abstract:
The invention is an aluminum etchant and method for chemically milling aluminum from, according to a preferred embodiment, a copper-aluminum-copper tri-metal layer to form three-dimensional circuits. The tri-metal comprises copper circuit patterns present on opposing surfaces of an aluminum foil, one of the copper patterns being laminated on a substrate. The etchant comprises an aqueous solution of 60 to 500 g/l base selected from (a) sodium hydroxide, (b) potassium hydroxide, and (c) their mixture; and 30 to 500 g/l of an additive selected from nitrite salt, a borate salt, a bromate salt, or mixture of any of them. The method comprises contacting the tri-metal with the etchant at a temperature between 25 and 95° C. for a time sufficient to remove a desired amount of the aluminum layer and provide (rigid, flexible, or 3-dimensional) electronic circuitry which may contain multiple conductive circuit layers.
Abstract:
A wiring board for electrical tests; having an insulating substrate, wiring of predetermined pattern which is embedded in the insulating substrate, and bump electrodes which are formed on the wiring and which are respectively brought into contact with corresponding electrodes of an article to-be-tested. Thus, even when the electrode pitch of the article to-be-tested such as a semiconductor device has become smaller(for example, less than 0.1 [mm]), the electrodes can be formed so as to cope with the electrical tests of the article.
Abstract:
The invention is an aluminum etchant and method for chemically milling aluminum, according to one embodiment, from a copper-aluminum-copper tri-metal layer to form electronic circuits. The tri-metal comprises copper circuit patterns present on opposing surfaces of an aluminum foil, one of the copper patterns being laminated on a substrate. The etchant comprises an aqueous solution of 50 to 500 g/l base selected from (a) sodium hydroxide, (b) potassium hydroxide, and (c) their mixture; and 60 to 500 g/l nitrate salt. The method comprises contacting the tri-metal with the etchant at a temperature between 25 and 95.degree. C. for a time sufficient to remove a desired amount of the aluminum layer and provide electronic circuitry (rigid/flexible/3-dimensional circuitry) which contains multiple conductive circuit layers.
Abstract:
범프형성용 금속층(2)/에칭스톱층(3)/배선형성용 금속층(4)으로 이루어지는 다층금속판(1)의 배선막형성용 금속층으로 배선막(4a)을 형성하여, 범프형성용 금속층으로 범프(2a)를 형성한 것을 복수 준비하여, 1개의 다층금속판의 범프의 형성면에 별도의 다층금속판의 배선막을 포갠다고 하는 형태로 반복하는 적층공정을 순차 반복하여 다층화를 한다. 또한, 금속판(1a)을 유지하는 금속판유지수단(13)과, 금속판의 위쪽에 칼날(26)을 유지하는 칼날유지수단(25)과, 해당 칼날유지수단의 높이를 조정하는 높이조정기구(20)와, 해당 칼날유지수단을 금속판의 표면에 대하여 상대적으로 평행하게 이동시키는 칼날평행이동기구(15)를 갖는 다층배선기판용 연마기(11a)로 연마한다.
Abstract:
표면에 금속 박막을 형성한 금속판과 금속박을, 접착제를 사용하지 않고 접합하고, 소정의 두께를 갖는 접착제 없는 다층 금속 적층판 및 그 제조를 연속화한 방법을 제공한다. 이 방법은, 금속판을 금속판 풀기 릴에 설치하는 공정과, 금속박을 금속박 풀기 릴에 설치하는 공정과, 금속판을 금속판 풀기 릴로부터 풀고 금속판 표면을 활성화하여 금속판 표면에 제 1 금속 박막을 형성하는 공정과, 금속박을 금속박 풀기 릴로부터 풀고 금속박 표면을 활성화하여 금속판 표면에 제 2 금속 박막을 형성하는 공정과, 활성화한 제 1 금속 박막면과 제 2 금속 박막면을 압접하여, 금속판 표면에 형성된 제 1 금속 박막면이 금속박 표면에 형성된 제 2 금속 박막면과 접하도록 적층하는 공정을 포함한다.
Abstract:
PROBLEM TO BE SOLVED: To provide a method of forming contacts for an interconnection element.SOLUTION: A method of forming contacts for an interconnection element includes the steps of: joining a conductive element 16 to an interconnection element 10 having multiple wiring layers; patterning the conductive element 16 to form conductive pins 20; and electrically interconnecting the conductive pins 20 with conductive features of the interconnection element 10. The interconnection element 10 has the multiple wiring layers separated by at least one dielectric layer 24, the multiple wiring layers including the plurality of conductive features exposed at a first face of the interconnection element 10; the plurality of conductive pins 20 protruding in a direction away from the first face; and metal traces 22 electrically interconnecting the conductive features with the conductive pins 20.