公开(公告)号：JP2000002755A

公开(公告)日：2000-01-07

申请号：JP5340699

申请日：1999-03-01

Applicant: ST MICROELECTRONICS SA

Inventor： COUTEAUX PASCAL ,  MARBOT ROLAND ,  NEZAMZADEH REZA

IPC: G06F1/04 ,  G01R31/28 ,  G01R31/30 ,  H04J3/14

Abstract: PROBLEM TO BE SOLVED: To test the robustness of a component to frequency dispersion and fluctuation by transmitting clock signals having different frequencies to a transmitter for a binary signal to be multiplexed and a transmitter for a multiplexed binary signal. SOLUTION: A clock generator 9 transmits clock signals CLK2, CLK3 to a transmitter 2 and a transmitter 3, respectively, and the output of the transmitter 2 is inputted to a circuit 4 of multiplexer, further inputted to a data processing circuit 7 and transmitted to a receiver 3 through a circuit 5 of reverse multiplexer. At this time, the clock generator 9, the transmitter and receivers 2, 3 and a link 6 constitute the circuits 4, 5, and the data processing circuit 7 constitutes a component to be tested or a circuit B. The receiver 3 compares the binary signal directly received from the transmitter 2 with the binary signal from the circuit 5. Namely, the influence of frequency dispersion and fluctuation on the component to be tested can be simulated by controlling the different clock signals CLK2, CLK3, and the function failure can be tested.

公开(公告)号：JPH11224910A

公开(公告)日：1999-08-17

申请号：JP32135798

申请日：1998-10-28

Applicant: ST MICROELECTRONICS SA

Inventor： PAPADAS CONSTANTIN

IPC: G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a new type of memory device having a simple structure that enables long-term residing using MOS technology. SOLUTION: This remaining, electrically programmable and erasable memory device has a MOS transistor containing a gate insulator of a charge transfer type. The gate insulator is provided with a laminate in the cross direction that comprises at least 5 regions, including the middle regions 14 and 15 having the first band gap value, with farthest end regions 11 and 12 having a band gap value larger than a first value, and the central region 13.

公开(公告)号：WO2007023213A3

公开(公告)日：2007-04-12

申请号：PCT/FR2006001768

申请日：2006-07-19

Applicant: ST MICROELECTRONICS SA ,  MOREAUX CHRISTOPHE ,  KARI AHMED ,  NAURA DAVID ,  RIZZO PIERRE

Inventor： MOREAUX CHRISTOPHE ,  KARI AHMED ,  NAURA DAVID ,  RIZZO PIERRE

IPC: G06F12/02

CPC classification number: G06F12/0292

Abstract: The invention relates to a method of configuring a memory space (MEM), comprising the following steps consisting in: reading a configuration datum (SZ3) in the memory space (MEM) and dividing at least part of the memory space into memory areas (Z1-Z4) as a function of the configuration datum read; and assigning each memory area with an access number (NBK) that is used to access a datum location in the memory area, together with a logical address of the location in the memory area. The invention is suitable for RFID chips.

Abstract translation: 本发明涉及一种配置存储空间（MEM）的方法，包括以下步骤：读取存储空间（MEM）中的配置数据（SZ3），并将至少部分存储空间划分为存储区域（Z1 -Z4）作为配置数据读取的函数; 以及为每个存储区域分配用于访问存储区域中的数据位置的访问号码（NBK）以及存储区域中的位置的逻辑地址。 本发明适用于RFID芯片。

公开(公告)号：WO2005091144A3

公开(公告)日：2006-12-07

申请号：PCT/FR2005000358

申请日：2005-02-16

Applicant: ST MICROELECTRONICS SA ,  HUMEAU GERARD ,  MARBOT ROLAND

Inventor： HUMEAU GERARD ,  MARBOT ROLAND

IPC: G06F11/30 ,  G06F11/36

CPC classification number: G06F11/3636

Abstract: The inventive method for monitoring a program execution by a processor (14) consists in collecting and transmitting monitoring data. Said monitoring data is serialised prior to the transmission thereof and, afterwards reconstituted in a program execution device. The same clock pulse unit (170) is used for serialising at least a part of monitoring data and for clocking another data serialisation which can relate to data produced by the program execution or to another part of monitoring data.

Abstract translation: 用于监视由处理器（14）执行程序的本发明的方法在于收集和发送监视数据。 所述监视数据在发送之前被序列化，然后在程序执行装置中重构。 相同的时钟脉冲单元（170）用于串行化监视数据的至少一部分，并且用于对与程序执行产生的数据或监视数据的另一部分相关的另一数据序列化进行计时。

公开(公告)号：WO2006120309A2

公开(公告)日：2006-11-16

申请号：PCT/FR2006000669

申请日：2006-03-29

Applicant: ST MICROELECTRONICS SA ,  PALMADE ROMAIN ,  ROGGE AGNES

Inventor： PALMADE ROMAIN ,  ROGGE AGNES

CPC classification number: H01L24/75 ,  H01L23/13 ,  H01L23/49855 ,  H01L24/05 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/05 ,  H01L2224/24227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/83136 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00014

Abstract: The invention relates to a semiconductor chip comprising an active face provided with an integrated circuit area which is implemented thereon and comprises at least one lateral inclined contact pad extending below the active face plane and electrically connected to the integrated circuit area. The invention also relates to an electronic module comprising a substrate provided with a cavity in which the chip is arranged. Said invention is used, in particular, for producing low-thickness contact-less micromodules for chip cards, badges and contact-less electronic labels.

Abstract translation: 本发明涉及一种半导体芯片，其包括设置有集成电路区域的有源面，其实现在其上，并且包括在有源面平面下方延伸并电连接到集成电路区域的至少一个侧向倾斜接触焊盘。 本发明还涉及一种电子模块，其包括设置有芯片的空腔的基板。 特别地，本发明用于生产用于芯片卡，徽章和无接触电子标签的低厚度无接触微型模块。

公开(公告)号：WO2004066350A3

公开(公告)日：2004-11-11

申请号：PCT/FR2004050011

申请日：2004-01-12

Applicant: ST MICROELECTRONICS SA ,  SCHOELLKOPF JEAN-PIERRE

Inventor： SCHOELLKOPF JEAN-PIERRE

IPC: H01L21/02 ,  H01L21/8244 ,  H01L27/07 ,  H01L27/11 ,  H01L29/94

CPC classification number: H01L28/60 ,  H01L27/0733 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/945

Abstract: The invention concerns a capacitor whereof one first electrode consists of a highly doped active region (D) of a semiconductor component (T) formed on one side of a surface of a semiconductor body, and whereof the second electrode consists of a conductive region (BR) coated with insulation (IL) formed beneath said active region and embedded in the semiconductor body.

Abstract translation: 本发明涉及一种电容器，其中一个第一电极由半导体组件（T）的高度掺杂的有源区（D）组成，半导体组件（T）形成在半导体主体的表面的一侧，并且第二电极由导电区域 ）涂覆有形成在所述有源区下面并且嵌入在半导体本体中的绝缘（IL）。

公开(公告)号：WO02056370A8

公开(公告)日：2002-08-08

申请号：PCT/FR0200054

申请日：2002-01-09

Applicant: ST MICROELECTRONICS SA ,  MENUT OLIVIER ,  GRIS YVON

Inventor： MENUT OLIVIER ,  GRIS YVON

IPC: H01L21/8242 ,  H01L27/108 ,  H01L27/146

CPC classification number: H01L29/808 ,  H01L27/10832 ,  H01L27/10861 ,  H01L27/10873 ,  H01L27/14683

Abstract: In one particular embodiment, the integrated circuit comprises a load storing semiconductor device comprising at least a control transistor T and a storage capacitor TRC. The device comprises a substrate including a lower region containing at least a buried capacitive trench TRC forming said storage capacitor, a casing CS located above said lower region of the substrate. The control transistor T is produced in and on the casing and said capacitive trench is located beneath the transistor and is in contact with the casing.

Abstract translation: 在一个具体实施例中，集成电路包括至少包括控制晶体管T和存储电容器TRC的负载存储半导体器件。 该器件包括：衬底，其包括至少包含形成所述存储电容器的掩埋电容沟槽TRC的下部区域，位于衬底的所述下部区域上方的壳体CS。 控制晶体管T产生在壳体中和壳体上，并且所述电容沟槽位于晶体管下方并与壳体接触。

公开(公告)号：WO0223846A3

公开(公告)日：2002-05-10

申请号：PCT/FR0102811

申请日：2001-09-11

Applicant: ST MICROELECTRONICS SA ,  CHIANALE ALAIN ,  BELHI BRIGITTE

Inventor： CHIANALE ALAIN ,  BELHI BRIGITTE

IPC: H04L27/06 ,  H04L27/30

CPC classification number: H04L27/30 ,  H04L27/06

Abstract: The invention concerns a dial tone detector. Said dial tone detector comprises a synchronous filtering digital circuit for comparing the frequency of a dial tone with a reference frequency (Fref). The invention is applicable in the field of telephone communications and communications carried out via a modem.

Abstract translation: 本发明涉及拨号音检测器。 所述拨号音检测器包括用于将拨号音的频率与参考频率（Fref）进行比较的同步滤波数字电路。 本发明适用于通过调制解调器进行的电话通信和通信领域。

公开(公告)号：WO2015025106A3

公开(公告)日：2015-04-23

申请号：PCT/FR2014052099

申请日：2014-08-18

Applicant: COMMISSARIAT ENERGIE ATOMIQUE ,  ST MICROELECTRONICS SA ,  ST MICROELECTRONICS CROLLES 2

Inventor： MONFRAY STÉPHANE ,  MAITRE CHRISTOPHE ,  KOKSHAGINA OLGA ,  SKOTNICKI THOMAS ,  SOUPREMANIEN ULRICH

IPC: H02N1/08

CPC classification number: H02N1/08 ,  B81B3/0021 ,  B81B3/0024 ,  B81B2203/053 ,  F01K5/02 ,  H02N1/006

Abstract: The invention relates to a device (400) for converting energy, comprising an enclosure (430) containing drops of a liquid (427) and an electret capacitive transducer (417, 419, 421) coupled to that enclosure.

Abstract translation: 用于转换能量的设备（400）技术领域本发明涉及一种用于转换能量的设备（400），其包括包含液滴（427）的外壳（430）和耦合到该外壳的驻极体电容换能器（417,419,421）。

公开(公告)号：WO2008102091A3

公开(公告)日：2008-10-09

申请号：PCT/FR2008050051

申请日：2008-01-10

Applicant: ST MICROELECTRONICS SA ,  CENTRE NAT RECH SCIENT ,  CATHELIN ANDREIA ,  FRAPPE ANTOINE ,  KAISER ANDREAS

Inventor： CATHELIN ANDREIA ,  FRAPPE ANTOINE ,  KAISER ANDREAS

IPC: H03M7/00

CPC classification number: H03M7/304 ,  H03M7/3026

Abstract: A digital delta-sigma modulator including a signal input for receiving N-bit digital samples, digital filter means connected to the signal input for performing add/subtract and integration operations using redundant arithmetic encoding to give filtered digital samples, and quantization means for performing a non-exact quantization operation to give n-bit output digital samples, where n is less than N. The input of the quantization means is connected within the digital filter means.

Abstract translation: 包括用于接收N位数字样本的信号输入的数字Δ-Σ调制器，连接到信号输入端的数字滤波器装置，用于使用冗余算术编码进行加法/减法和积分操作以给出经过滤波的数字样本，以及量化装置， 非精确量化操作以给出n比特输出数字样本，其中n小于N.量化装置的输入连接在数字滤波器装置内。