公开(公告)号：JP5217640B2

公开(公告)日：2013-06-19

申请号：JP2008143664

申请日：2008-05-30

Applicant: 富士通株式会社

Inventor： 英明 吉村 ,  隆 中川 ,  健治 福園 ,  隆 菅田 ,  友久 八木

IPC: H05K3/46 ,  H05K3/40

CPC classification number: H05K3/321 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0218 ,  H05K2201/0323 ,  H05K2201/0361 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/0156 ,  H05K2203/061

公开(公告)号：JP4447762B2

公开(公告)日：2010-04-07

申请号：JP2000318626

申请日：2000-10-18

Applicant: 東洋鋼鈑株式会社

Inventor： 一雄 吉田 ,  真司 大澤 ,  浩明 岡本 ,  謹二 西條

IPC: B23K20/00 ,  B32B15/01 ,  B23K20/04 ,  B23K20/14 ,  H05K3/02 ,  H05K3/06

CPC classification number: H05K3/025 ,  B23K20/04 ,  B32B15/01 ,  H05K3/062 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/068 ,  Y10T428/12 ,  Y10T428/12438 ,  Y10T428/12896 ,  Y10T428/12979

公开(公告)号：JP2007335698A

公开(公告)日：2007-12-27

申请号：JP2006166980

申请日：2006-06-16

Applicant: Fujitsu Ltd ,  富士通株式会社

Inventor： TAKANO KENJI ,  SHIBATA MUNEKAZU ,  ARAI KAZUYA ,  KANAI JUNICHI ,  SUGIMOTO KAORU

IPC: H05K3/46

CPC classification number: H05K3/20 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/423 ,  H05K3/4682 ,  H05K2201/0361 ,  H05K2201/096 ,  H05K2203/0156 ,  H05K2203/0384 ,  H05K2203/1536 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a wiring board which can highly efficiently manufacture a thin wiring board enabling high-density wiring. SOLUTION: The manufacturing method is provided with a photolithographic process of etching a third metal layer 65 of a three-layer metal laminate 62 to form the metal layer into a predetermined wiring pattern 71, a process of forming a laminate 76 in which a wiring pattern 74 is electrically connected between layers via an insulating layer 73 by a build-up method on the wiring pattern 71, a process of peeling the laminate 76 from a supporting substrate 60 between the first metal layer 63 and the supporting substrate 60, a process of removing the first metal layer 63 of the laminate 76 by etching while using a second metal layer 64 as a barrier layer, and a process of removing the exposed second metal layer 64 by etching. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够高效地制造能够实现高密度布线的薄布线板的布线板的制造方法。 解决方案：制造方法具有蚀刻三层金属层压体62的第三金属层65以形成预定布线图案71的金属层的光刻工艺，形成层压体76的工艺，其中 布线图案74通过布线图案71上的堆积方法经由绝缘层73经由绝缘层73电连接，层叠体76从第一金属层63和支撑基板60之间的支撑基板60剥离的过程， 使用第二金属层64作为阻挡层，通过蚀刻除去层叠体76的第一金属层63的工序，以及通过蚀刻除去露出的第二金属层64的工序。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007129180A

公开(公告)日：2007-05-24

申请号：JP2006091241

申请日：2006-03-29

Applicant: Cmk Corp ,  日本シイエムケイ株式会社

Inventor： HIRATA EIJI

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/20 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/06 ,  H05K3/421 ,  H05K3/427 ,  H05K3/4652 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/1184 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: PROBLEM TO BE SOLVED: To provide a printed wiring board whose high dense wiring and thinning can be attained even if forming a BVH where plating is selectively filled into a non-through-hole as an interlayer connection means. SOLUTION: A method includes a step of laminating a metal foil 2, and a barrier metal layer 3 on an insulating layer 1 in order; a step of boring a non-through-hole 5 by irradiating a laser beam from the barrier metal layer 3; a step of filling a plating 7 into the non-through-hole by plating treatment, and of depositing the plating 7 on the barrier metal layer 3 too, after an external angle treatment; a step of removing the plating 7 deposited on the barrier metal layer 3 and the plating 7 protruded from the non-through-hole 5 due to an etching treatment; a step of peeling the barrier metal layer 3; and a step of etching the metal foil 2 to form a wiring pattern 8. Through the above steps, the plating 7 is not formed on the wiring pattern 8 containing a land of the blind via hole 9. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为了提供即使形成选择性地填充到非通孔中的BVH作为层间连接装置的BVH也可以实现高密度布线和变薄的印刷布线板。 解决方案：一种方法包括依次层压绝缘层1上的金属箔2和阻挡金属层3的步骤; 通过从阻挡金属层3照射激光而使非通孔5钻孔的步骤; 通过电镀处理将电镀7填充到非通孔中，并且在外角处理之后也将电镀7沉积在阻挡金属层3上的步骤; 通过蚀刻处理去除沉积在阻挡金属层3上的电镀7和从非通孔5突出的电镀7的步骤; 剥离阻挡金属层3的步骤; 以及蚀刻金属箔2以形成布线图案8的步骤。通过上述步骤，在包含盲孔9的台面的布线图案8上不形成电镀7。版权所有（C） 2007年，日本特许厅和INPIT

公开(公告)号：JP2006147881A

公开(公告)日：2006-06-08

申请号：JP2004336480

申请日：2004-11-19

Applicant: Multi:Kk ,  Toyo Kohan Co Ltd ,  東洋鋼鈑株式会社 ,  株式会社マルチ

Inventor： WATANABE MITSUHIRO ,  SAIJO KINJI ,  OSAWA SHINJI ,  YOSHIDA KAZUO ,  NANBU KOJI

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/06 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K3/427 ,  H05K1/0265 ,  H05K1/116 ,  H05K3/062 ,  H05K3/20 ,  H05K3/4658 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0376 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/1476 ,  Y10T156/10

Abstract: PROBLEM TO BE SOLVED: To provide a printed wiring board which can be minimized substantially by bringing closer the circuit width of a signal circuit, which requires a design offering a large circuit width, and that of a power supply circuit or the like as much as possible, and to provide a method for manufacturing the printed wiring board. SOLUTION: The printed wiring board is made by etching a metal-attached laminated board including a conductive layer and an insulating layer, and has a first and second circuits that have thicknesses different from each other and that are formed in common on the same reference plane. Either the first circuit or the second circuit, which is a thicker one, is a lamination of a clad structure consisting of a first copper layer, a different kind of metal layer, and a second copper layer. In manufacturing the printed wiring board, a clad composite material consisting of the lamination of the first copper layer, the different kind of metal layer, and the second copper layer is used as a starting material, and the selective etching characteristics of the different kind of metal layer and the copper layers are utilized effectively. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供可以通过使需要提供大的电路宽度的设计的信号电路的电路宽度和电源电路等的电路宽度最小化来实现最小化的印刷电​​路板 并且提供制造印刷电路板的方法。 解决方案：印刷电路板通过蚀刻包括导电层和绝缘层的金属附着层叠板制成，并且具有第一和第二电路，其具有彼此不同的厚度，并且在第 相同的参考平面。 作为较厚的第一电路或第二电路，是由第一铜层，不同种类的金属层和第二铜层构成的包层结构的叠层。 在制造印刷电路板时，使用由第一铜层，不同种类的金属层和第二铜层的叠层构成的包层复合材料作为起始材料，并且使用不同种类的 金属层和铜层有效利用。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：US09894764B2

公开(公告)日：2018-02-13

申请号：US15096993

申请日：2016-04-12

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Sung-Uk Lee ,  Il-Jong Seo ,  Jae-Hoon Choi ,  Yong-Ho Baek

IPC: H05K1/11 ,  H05K3/06

CPC classification number: H05K1/115 ,  H05K3/067 ,  H05K3/4647 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/0361 ,  H05K2201/09854 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0384

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are provided. The printed circuit board includes an insulating layer, a circuit layer embedded in the insulating layer, a solder resist layer disposed on one surface of the insulating layer, the solder resist layer having a cavity of a through-hole shape to expose a part of the circuit layer from the insulating layer, and a metal post embedded in the solder resist layer and exposed to outside via an opening of the solder resist layer, and the metal post includes a first post metal layer, a post barrier layer, and a second post metal layer disposed in that order.

公开(公告)号：US08796691B2

公开(公告)日：2014-08-05

申请号：US12559181

申请日：2009-09-14

Applicant: Chieh-Wen Lin ,  Chih-Chieh Wang ,  Sheng-Wen Chang ,  Te-Chang Wan

Inventor： Chieh-Wen Lin ,  Chih-Chieh Wang ,  Sheng-Wen Chang ,  Te-Chang Wan

IPC: H01L27/14

CPC classification number: H05K3/06 ,  G02F1/1345 ,  G02F1/13458 ,  H05K2201/0361 ,  H05K2203/1184

Abstract: A system for displaying images and fabricating method thereof are provided. The system includes a thin film transistor substrate including a substrate having a display area and a pad area. The thin film transistor substrate further includes a conductive line disposed on the substrate in the display area. The conductive line includes a lower metal line, an upper metal line and a middle metal line therebetween. The width of the middle metal line is narrower than that of the upper metal line.

Abstract translation: 提供一种用于显示图像的系统及其制造方法。 该系统包括薄膜晶体管基板，其包括具有显示区域和焊盘区域的基板。 薄膜晶体管基板还包括布置在显示区域中的基板上的导线。 导线包括下金属线，上金属线和中间金属线。 中间金属线的宽度比上金属线的宽度窄。

公开(公告)号：US08513070B2

公开(公告)日：2013-08-20

申请号：US13200379

申请日：2011-09-23

Applicant: Dong-Wook Park ,  Jong-Hyun Park

Inventor： Dong-Wook Park ,  Jong-Hyun Park

IPC: H01L21/84 ,  H01L21/00 ,  H01L21/461 ,  H01L21/311

CPC classification number: H01L27/124 ,  H01L27/1259 ,  H01L29/42384 ,  H01L29/78645 ,  H05K3/062 ,  H05K3/064 ,  H05K2201/0361 ,  H05K2203/0554 ,  H05K2203/0597 ,  Y10T29/49156

Abstract: A method of manufacturing a wire may include forming a wire pattern, which at least includes a first conductive layer, a second conductive layer, and a third conductive layer arranged in the order stated on a substrate. At least the second conductive layer may have higher etch selectivity than the first and third conductive layers. Side holes may be formed by removing portions of the second conductive layer at ends of the wire pattern, and fine wires may be formed by injecting a masking material into the side holes and patterning the wire pattern by using the masking material as a mask.

Abstract translation: 线的制造方法可以包括形成至少包括第一导电层，第二导电层和在基板上按顺序排列的第三导电层的布线图案。 至少第二导电层可具有比第一和第三导电层更高的蚀刻选择性。 可以通过在线图案的端部去除第二导电层的部分来形成侧孔，并且可以通过将掩模材料注入侧孔中并且通过使用掩模材料作为掩模来图案化线图案来形成细线。

公开(公告)号：US20100236817A1

公开(公告)日：2010-09-23

申请号：US12408719

申请日：2009-03-22

Applicant: Kuo-Ching Chen ,  Tsung-Yuan Chen ,  Cheng-Pin Chien

Inventor： Kuo-Ching Chen ,  Tsung-Yuan Chen ,  Cheng-Pin Chien

IPC: H01L21/98 ,  C23F1/00 ,  H01L21/52 ,  H01L21/56 ,  H05K1/09

CPC classification number: H01L23/3128 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/183 ,  H05K1/186 ,  H05K3/06 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0361 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/308 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2224/0401

Abstract: A method of making a package substrate includes providing a cladding sheet comprising a first metal layer, a second metal layer and an intermediate layer between the first and second metal layers; etching away a portion of the first metal layer to expose a portion of the intermediate layer thereby forming a metal island body; laminating a first copper clad on the cladding sheet comprising a first copper foil and a first insulating layer; patterning the first copper foil to form a first circuit trace; patterning the second metal layer to form a second circuit trace; removing the metal island body to form a cavity in the first insulating layer; and removing the intermediate layer from bottom of the cavity.

Abstract translation: 制造封装衬底的方法包括提供包括第一金属层，第二金属层和第一和第二金属层之间的中间层的覆层片; 蚀刻掉第一金属层的一部分以暴露中间层的一部分，从而形成金属岛体; 在包括第一铜箔和第一绝缘层的包层片上层叠第一铜包层; 图案化第一铜箔以形成第一电路迹线; 图案化第二金属层以形成第二电路迹线; 去除所述金属岛体以在所述第一绝缘层中形成空腔; 以及从腔的底部去除中间层。

公开(公告)号：US20100206619A1

公开(公告)日：2010-08-19

申请号：US12485889

申请日：2009-06-16

Applicant: Kuo-Ching Chen ,  Tsung-Yuan Chen ,  Cheng-Pin Chien

Inventor： Kuo-Ching Chen ,  Tsung-Yuan Chen ,  Cheng-Pin Chien

IPC: H05K1/00 ,  H05K1/16 ,  H05K1/11 ,  H05K3/30

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H05K1/0206 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0361 ,  H05K2201/10545 ,  H05K2203/308 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package substrate structure includes a substrate with a first side and a second side opposite to the first side, a via connecting the first side and the second side, a cavity in the substrate and on the first side, and a patterned conductive layer disposed on at least one of the first side and the second side, filling the cavity and the via, and including a first conductive layer, a second conductive layer and a third conductive layer. The second conductive layer is different from at least one of the first conductive layer and the third conductive layer.

Abstract translation: 封装衬底结构包括具有第一侧和与第一侧相对的第二侧的衬底，连接第一侧和第二侧的通孔，在衬底中和第一侧上的空腔，以及设置在第一侧上的图案化导电层 第一侧和第二侧中的至少一个，填充空腔和通孔，并且包括第一导电层，第二导电层和第三导电层。 第二导电层与第一导电层和第三导电层中的至少一个不同。