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公开(公告)号：DK81992D0
公开(公告)日：1992-06-22
申请号：DK81992
申请日：1992-06-22
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：GB2236232A
公开(公告)日：1991-03-27
申请号：GB9017560
申请日：1990-08-10
Applicant: KOREA TELECOMMUNICATION
Inventor： EUNG IN KIM , JAE IN KIM , JONG RAK LEE
Abstract: In a voice information system a telephone (1) is provided to transmit a Dual Tone Multi-Frequency (DTMF) signal by utilizing a character panel including a plurality of buttons (30) which are orderly arranged therein. An exchange (2) is provided to switch the DTMF signal. A telephone line matching apparatus (3) is connected from the exchange to detect a line status of the system and protect the system from an instantaneous higher voltage. A DTMF receiver apparatus (4) converts the DTMF signal into a corresponding digital signal. A service provider terminal means (9) is provided to input a plurality of key words corresponding to each service name and information data to be provided. A key word storage apparatus (6) includes a service name file unit for storing a service name file, and a key word dictionary unit for storing a key word dictionary. A text information storage apparatus (7) stores a plurality of information data corresponding to each service name. A Central Processor Unit converts a digital signal outputted from the DTMF receiver apparatus into an input character string to match the input character string with the key words stored in the key word storage apparatus in order to provide information data. A voice output apparatus is connected from the Central Processor Unit, for converting a digital voice data signal into a voice signal to thereby provide the desired information service to the user.
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公开(公告)号：GB2233177A
公开(公告)日：1991-01-02
申请号：GB9010055
申请日：1990-05-04
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor： SHIN DONG KWAN
Abstract: A digital auto-phase-controlled retiming circuit automatically locates the retiming clock phase in the centre of an input data eye pattern by detecting the phase difference between the retiming clock and data, and tracking the mutual phase variation. Tracking occurs when the mutual phase difference between data and retiming clock is uncertain and changes with time e.g. in digital transmission and/or digital signal processing systems. The circuit comprises a phase detector / retimer U1, a loop processor U2 and a phase shifter U3. The phase detector1retimer U1 includes a gate (OR1, Fig 2) for receiving input data, a gate (OR2, Fig 2) for receiving an input retiming clock and a flip flop (FF2, Fig 2) for producing a retimed data signal.
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公开(公告)号：GB2230383A
公开(公告)日：1990-10-17
申请号：GB9006850
申请日：1990-03-27
Applicant: ELECTRONIC & TELECOMM RES INST , KOREA TELECOMMUNICATION
Inventor： KIM SANG-BAE
Abstract: An active layer and a clad layer are formed as a reverse mesa on a substrate, and the clad layer selectively etched so that the active layer protrudes at the sides of the mesa. During the subsequent epitaxial growth of the current blocking layers, the protruding portions of the active layer are melted back. Defects in the outer portions of the active layer caused by high temperatures during the growth of the blocking layer are thus removed. … …
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公开(公告)号：HK1043821A1
公开(公告)日：2002-09-27
申请号：HK02105235
申请日：2002-07-16
Applicant: KOREA TELECOMMUNICATION
Inventor： SEO MYUNG WOO , PARK JEONG KWEN , KANG WANG KYU
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Patent Agency Ranking
公开(公告)号：AU5273501A
公开(公告)日：2001-10-30
申请号：AU5273501
申请日：2001-04-18
Applicant: KOREA TELECOMMUNICATION
Inventor： JUNG IL-HYUNG
IPC: G06F17/30
Abstract: The present invention relates to a method and system for extracting a meaningful core word from a query and a method and system for retrieving information based on the same are disclosed. The system for retrieving extracts a meaningful core word of a lemma, expands the lemma and retrieves texts based on the expanded lemma, to thereby improve performance of the retrieval system and convenience of a user.
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公开(公告)号：GB2313729B
公开(公告)日：2000-10-11
申请号：GB9710775
申请日：1997-05-23
Applicant: KOREA TELECOMMUNICATION
Inventor： KIM SUNG RYONG , KIM YOUNG MAN , BAIK SONG HOON , KIM HYO SIL , JEONG JAE WOO
Abstract: A method for automatically verifying the accuracy of an electronic map, said method involving an XORing operation for raster data produced by scanning an original map and vector data finally produced based on the raster data, and a filtering operation for data resulting from the XORing operation. The method includes the steps of scanning an original map, thereby producing raster data, digitizing the raster data, thereby producing vector data, transforming the vector data into raster data, comparing the raster data transformed from the vector data with the original raster data by use of a function of similarity involving an exclusive ORing operation, and removing noise existing in the original raster data by a filtering operation. In accordance with this method, it is possible to reduce the verification time and costs while improving the accuracy of the verification.
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公开(公告)号：GB2306716B
公开(公告)日：2000-02-16
申请号：GB9622841
申请日：1996-11-01
Applicant: KOREA TELECOMMUNICATION
Inventor： KIM KYEOUN SOO , JANG SOON HWA , KWON SOON HONG
Abstract: A very large scale integrated circuit for performing a bit-serial matrix transposition operation, comprising an input shift register module for inputting N multiplied results of two NxN matrixes in the unit of k bits and outputting them in the unit of k/N bits in response to a load signal, a bit-serial transposition module for selecting k/N-bit data from the input shift register module in response to a switching control signal, an output multiplexer module for selecting k/N-bit data from the bit-serial transposition module in response to the switching control signal, and an output register module for inputting output data from the output multiplexer module in the unit of k/N bits and outputting N data in the unit of k bits. According to the present invention, when an NxN matrix transposition operation is performed, the operation occupancy of transposition cells becomes 100% after an N-input delay occurs. Also, the processing unit of data becomes smaller by using a bit-serial processing algorithm. Therefore, the high-speed operation can be performed. Further, the number of gates can be reduced in the integrated circuit. Moreover, because the integrated circuit has a pipelined structure, it is applicable to a multi-dimensional signal processing system requiring a high-speed processing operation.
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公开(公告)号：AU6057298A
公开(公告)日：1999-10-14
申请号：AU6057298
申请日：1998-04-01
Applicant: KOREA TELECOMMUNICATION
Inventor： KIM HAN HO , AHN TAE HYO , CHUN JOONG CHANG , PARK JIN SOO , YOON YONG HO , HWANG WON TAIK
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公开(公告)号：PT100692B
公开(公告)日：1999-06-30
申请号：PT10069292
申请日：1992-07-15
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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