公开(公告)号：US06740820B2

公开(公告)日：2004-05-25

申请号：US10020287

申请日：2001-12-11

Applicant: Andrew Cheng

Inventor： Andrew Cheng

IPC: H05K116

CPC classification number: H05K7/1084 ,  H01R43/0256 ,  H05K3/3494 ,  H05K2201/10189 ,  H05K2201/10204 ,  H05K2201/10325 ,  H05K2203/041 ,  H05K2203/165

Abstract: An electrical system includes a printed circuit board with conductive traces formed thereon. An electrical connector includes an insulative base with an array of cells defined therein. Each cell receives and retains a conductive contact having a tail portion corresponding to the conductive traces. Soldering pre-forms are arranged between the conductive traces and the tail portions. A heat distributor includes a thermally conductive base plate positioned on the connector base and thermally conductive pins extending from the base plate. The base plate is positioned on the connector base with the pins inserted into the cells and thermally engaging selected contacts so as to create a homogenous heat transfer to/from the soldering pre-forms thereby eliminating heat stress among the soldering pre-forms

Abstract translation: 电气系统包括其上形成有导电迹线的印刷电路板。 电连接器包括其中限定有单元阵列的绝缘基座。 每个单元接收并保持具有对应于导电迹线的尾部的导电接触。 焊接预制件布置在导电迹线和尾部之间。 热分配器包括位于连接器基座上的导热基板和从基板延伸的导热销。 底板位于连接器基座上，插销插入电池中并与选定的触点热接合，以便产生与焊接预成型体的均匀热传递，从而消除了焊接预成型件之间的热应力

公开(公告)号：US20040001327A1

公开(公告)日：2004-01-01

申请号：US10452455

申请日：2003-06-03

Inventor： Kazuyuki Nagata

IPC: H05K007/02 ,  H05K007/06 ,  H05K007/08 ,  H05K007/10

CPC classification number: H05K1/0266 ,  H05K1/0295 ,  H05K1/18 ,  H05K2201/09936 ,  H05K2201/09954 ,  H05K2201/10015 ,  H05K2201/10174 ,  H05K2201/10204 ,  H05K2201/10522 ,  H05K2203/168

Abstract: Disclosed is a foolproof polarity indication of poled electronics parts or devices to be given to a printed circuit board to assure that poled electronics parts and/or devices be correctly mounted in respect of their polarities to meet occasional requirements dependent on different specifications. Each pair of terminal holes are allotted to a given poled electronics part or device. Two symbols representative of such electronics part or device are arranged side by side on either side of the line drawn from one to the other terminal hole. The poled electronics part or device symbols are of reversed polarities. This dual symbol arrangement is effective to draw workers' attention in mounting electrode components in terms of their polarities. When extra components or dummy ones are combined with such a poled component, they are encircled by a boundary line, thereby showing the correct polarity direction of the poled component in respect of whether it is enclosed or not.

Abstract translation: 公开了一种给予印刷电路板的极化电子部件或装置的绝对极性指示，以确保极化的电子部件和/或设备在其极性方面被正确地安装，以满足取决于不同规格的偶尔要求。 每对端子孔分配给给定的极化电子部件或器件。 代表这种电子部件或装置的两个符号被并排地布置在从一个端子孔到另一个端子孔的线的任一侧上。 极化的电子部件或器件符号具有相反的极性。 这种双重符号排列是有效的吸引工作人员注意安装电极组件的极性方面。 当额外的元件或虚拟元件与这种极化元件组合时，它们被边界线包围，从而显示极限元件的正确极性方向是否被封闭。

公开(公告)号：US20030183948A1

公开(公告)日：2003-10-02

申请号：US10402555

申请日：2003-03-27

Inventor： Yew Fei Tham ,  Vijay Kumar Dharmadhikari

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L22/34 ,  G01N21/278 ,  G01N21/95684 ,  G01N2021/95669 ,  G01R1/0483 ,  H05K3/3436 ,  H05K2201/10204 ,  H05K2201/10234 ,  Y02P70/613

Abstract: A ball grid array unit suitable for calibrating an inspection system, comprising a substrate and an array of balls mounted on a surface of the substrate, the balls having a melting point greater than 400 degrees centigrade or a Britnell hardness number greater than 150.

Abstract translation: 一种适用于校准检查系统的球栅阵列单元，包括基底和安装在基底表面上的球阵列，所述球的熔点大于400摄氏度或Britnell硬度大于150。

公开(公告)号：US20030111262A1

公开(公告)日：2003-06-19

申请号：US10195547

申请日：2002-07-16

Inventor： Shunichi Kikuchi ,  Mitsutaka Yamada ,  Kenji Iketaki

IPC: H05K003/30 ,  H05K003/34

CPC classification number: H05K1/0209 ,  H05K1/0201 ,  H05K3/3494 ,  H05K2201/066 ,  H05K2201/09781 ,  H05K2201/10204 ,  H05K2203/1121 ,  H05K2203/304 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A printed wiring board device includes circuit parts which are mounted on a wiring board and constitute parts of a circuit in the printed wiring board device. Pads are provided on the wiring board in the circumference of the circuit parts, and the pads being electrically isolated from the circuit. Heat-absorbing dummy parts are mounted on the pads, and the dummy parts absorb heat from the circuit parts through the pads during reflow soldering.

Abstract translation: 印刷电路板装置包括安装在布线板上并构成印刷线路板装置中的电路的一部分的电路部分。 在电路部分的圆周上的布线板上设置有焊盘，并且焊盘与电路电隔离。 吸热虚拟部件安装在焊盘上，并且虚拟部件在回流焊接期间通过焊盘吸收来自电路部件的热量。

公开(公告)号：US20030043552A1

公开(公告)日：2003-03-06

申请号：US10231322

申请日：2002-08-30

Applicant: NEC CORPORATION

Inventor： Takashi Abe

IPC: H05K001/00 ,  H05K001/18 ,  H05K007/02 ,  H05K007/06 ,  H05K007/08

CPC classification number: H05K1/0266 ,  H05K1/029 ,  H05K1/18 ,  H05K2201/09127 ,  H05K2201/09927 ,  H05K2201/10204

Abstract: A circuit board permits common use of the same circuit board without separately manufacturing the circuit board per providing destinations when similar circuit boards are manufactured for a plurality of providing destinations in the same factory. The circuit board has at least a first providing destination indicating region on which a first providing destination is indicated and a second providing destination indicating region located adjacent the first providing destination indicating region, on which second providing destination region, a second providing destination is indicated, the providing destination indicating regions other than that indicating an intended providing destination being hidden by mounting parts thereon.

Abstract translation: 电路板允许在同一工厂中为多个提供目的地制造类似的电路板时，不需要在提供目的地的情况下单独制造电路板，因此可以通用同一电路板。 电路板至少具有指示第一提供目的地的第一提供目的地指示区域和位于第一提供目的地指示区域附近的第二提供目的地指示区域，第二提供目的地区域指示第二提供目的地区域， 提供目的地指示除了通过在其上安装部件来指示预期提供目的地被隐藏的区域之外的区域。

公开(公告)号：US20020135104A1

公开(公告)日：2002-09-26

申请号：US10026382

申请日：2001-12-20

Inventor： Jesse Pedigo ,  Timothy Meyer

IPC: B23K031/02

CPC classification number: H05K3/1233 ,  H05K3/0094 ,  H05K3/4053 ,  H05K3/4069 ,  H05K2201/0959 ,  H05K2201/10204 ,  H05K2203/0126 ,  H05K2203/0139 ,  H05K2203/0156 ,  H05K2203/0182 ,  H05K2203/0554 ,  H05K2203/1105

Abstract: A filling system includes a pressurized source of fill material and a pressure fill head wherein the fill head also includes a heating element positioned so as to transfer heat to fill material passing through the fill head. A method of filling holes using a fill material passing through a pressure fill head includes the steps of causing fill material to enter the fill head, modifying the viscosity of the fill material while it is within the fill head, and causing the modified viscosity fill material to exit the fill head and enter at least one hole.

Abstract translation: 填充系统包括加压填充源和压力填充头，其中填充头还包括加热元件，其被定位成传递热量以填充通过填充头的材料。 使用通过压力填充头的填充材料填充孔的方法包括以下步骤：使填充材料进入填充头，在填充头内部改变填充材料的粘度，并且使改性粘度填充材料 退出填充头并进入至少一个孔。

公开(公告)号：US5978093A

公开(公告)日：1999-11-02

申请号：US895766

申请日：1997-07-17

Applicant: Steve Abrahamson

Inventor： Steve Abrahamson

IPC: H05K1/02 ,  H05K3/30 ,  H05K13/04 ,  G01B11/00 ,  G01J1/02 ,  G06K9/00 ,  H01L21/66

CPC classification number: H05K3/305 ,  H05K13/0465 ,  H05K1/0269 ,  H05K2201/0108 ,  H05K2201/10204 ,  H05K2203/161 ,  H05K2203/162 ,  Y02P70/613

Abstract: A method and apparatus for calibrating surface mounting processes in the manufacturing of printed circuit board assemblies. In one embodiment of a method in accordance with the invention, a test pad of adhesive is deposited onto a substrate, and then a test module is mounted to the substrate at the test pad. The test module is representative of an electrical component that is to be mounted to a printed circuit board, and the test module is mounted to the substrate in a manner in which the electrical component is to be mounted to a printed circuit board. After the test module is mounted to the substrate, the profile of the test pad is detected through the substrate and/or the test module to determine whether the test pad contacts enough of the test module to sufficiently adhere the test module to the substrate without interfering with the terminals of the test module. Accordingly, this embodiment of the inventive method provides an indication or estimate of the desired volume of an adhesive pad to mount a specific component to a PCB.

Abstract translation: 一种用于校准印刷电路板组件制造中的表面安装工艺的方法和装置。 在根据本发明的方法的一个实施例中，将粘合剂测试垫沉积到基底上，然后在测试垫处将测试模块安装到基底上。 测试模块代表要安装到印刷电路板的电气部件，并且测试模块以将电气部件安装到印刷电路板的方式安装到基板。 在将测试模块安装到衬底之后，通过衬底和/或测试模块检测测试焊盘的轮廓，以确定测试焊盘是否接触足够的测试模块，以充分地将测试模块粘附到衬底而不干扰 与测试模块的终端。 因此，本发明方法的该实施例提供了将特定部件安装到PCB的粘合垫的期望体积的指示或估计。

公开(公告)号：US5626713A

公开(公告)日：1997-05-06

申请号：US366615

申请日：1994-12-30

Applicant: Shoji Yamaguchi ,  Akira Yamada ,  Yasuo Furuhashi ,  Fumiaki Baba

Inventor： Shoji Yamaguchi ,  Akira Yamada ,  Yasuo Furuhashi ,  Fumiaki Baba

IPC: H05K3/38 ,  B29C33/68 ,  B29C37/00 ,  H05K1/18 ,  H05K3/46 ,  B32B35/00

CPC classification number: B29C37/005 ,  B32B37/0023 ,  B32B37/04 ,  B32B37/1284 ,  B32B37/26 ,  H05K3/4697 ,  B29C33/68 ,  B29L2031/3425 ,  B32B2457/08 ,  H05K1/183 ,  H05K2201/0129 ,  H05K2201/10204 ,  H05K2203/063 ,  H05K2203/1147 ,  Y10T156/16

Abstract: An apparatus for producing a multi-layer printed circuit board. The printed circuit board includes a bottom layer board, a hole board, and an adhesive sheet between the bottom layer board and the hole board. The printed circuit board is heated so that adhesive sheet bonds the bottom layer board to the hole board. A mold release sheet and a thermoplastic resin sheet begins to soften at a temperature lower than the melting temperature of the adhesive. A contraction control member controls contraction when the thermoplastic resin sheet cools.

Abstract translation: 一种多层印刷电路板的制造装置。 印刷电路板包括底层板，孔板和底层板和孔板之间的粘合片。 印刷电路板被加热，使得粘合片将底层板粘合到孔板。 脱模片和热塑性树脂片在低于粘合剂的熔融温度的温度下开始软化。 当热塑性树脂片材冷却时，收缩控制构件控制收缩。

公开(公告)号：US5296082A

公开(公告)日：1994-03-22

申请号：US853115

申请日：1992-03-18

Applicant: Isamu Kubo

Inventor： Isamu Kubo

IPC: B26F1/02 ,  B25B1/24 ,  H05K3/00 ,  H05K13/00 ,  B32B31/14

CPC classification number: B25B1/241 ,  H05K3/005 ,  H05K2201/10204 ,  H05K3/0047 ,  Y10S269/90 ,  Y10S269/903 ,  Y10S83/942

Abstract: A mold used in producing printed wiring board is disclosed. The mold comprises upper dies and lower dies for sandwiching a printed wiring board therebetween, thereby performing drilling, punching or the like, one of said upper dies and lower dies having a press surface which is provided with concave or convex portions for absorbing steps caused by forming a printed wiring circuit on the printed wiring board.

Abstract translation: 公开了用于制造印刷电路板的模具。 模具包括用于将印刷电路板夹在其间的上模和下模，从而执行钻孔，冲孔等，所述上模和下模中的一个具有压制表面，所述压模表面设置有凹部或凸部，用于吸收由 在印刷电路板上形成印刷布线电路。

公开(公告)号：US5196087A

公开(公告)日：1993-03-23

申请号：US717341

申请日：1991-06-18

Applicant: Robert Q. Kerns

Inventor： Robert Q. Kerns

IPC: H05K3/00 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/4638 ,  H05K3/0002 ,  H05K2201/10204 ,  H05K2203/056 ,  H05K2203/162 ,  H05K3/0005 ,  H05K3/427 ,  H05K3/4611

Abstract: A multi-layer printed circuit board is disclosed as having more layers and greater accuracy in the conductive traces of those layers than has been previously possible. Using the disclosed method, multi-layer printed circuit boards can be built having a conductive path width of 0.5 mils (0.0127 mm) and spacing between such conductive traces of 0.5 mils (0.0127 mm). The method enables multi-layer boards to be created having more than eight layers, and still maintaining the desired 0.5 mil conductive path width and spacing. The enhanced accuracy and increased number of layers is made possible by use of adjustments to customer-supplied art work based upon evaluation of test pieces made early in the procedure. By use of the disclosed method, multi-layer printed circuit boards can be built having a high density of coaxial cable equivalents and tuned wave guide equivalents. An apparatus is also disclosed which connects the coaxial cable equivalents and tuned wave guide equivalents from one multi-layer printed circuit board to a second multi-layer printed circuit board.

Abstract translation: 公开了一种多层印刷电路板，其在这些层的导电迹线中具有比之前可能的更多的层和更高的精度。 使用所公开的方法，可以构建具有0.5密耳（0.0127mm）的导电路径宽度和0.5密耳（0.0127mm）的这种导电迹线之间的间隔的多层印刷电路板。 该方法使得能够创建具有多于8层的多层板，并且仍然保持期望的0.5密耳导电路径宽度和间隔。 通过基于对程序早期制作的试件的评估，对客户提供的艺术作品进行调整，可以提高精度和增加层数。 通过使用所公开的方法，可以构建具有高密度同轴电缆等效物和调谐波导等效物的多层印刷电路板。 还公开了将同轴电缆等效物和调谐波导等效物从一个多层印刷电路板连接到第二多层印刷电路板的装置。