-
公开(公告)号：KR1020120050868A
公开(公告)日：2012-05-21
申请号：KR1020100112329
申请日：2010-11-11
Applicant: 삼성전기주식회사
CPC classification number: C25D21/02
Abstract: PURPOSE: A plating device is provided to increase plating speed by raising the temperature of a work piece to improve the efficiency of plating current. CONSTITUTION: A plating device comprises a plating bath(10) accommodating plating liquid(5), an anode electrode(20) which is installed in the plating bath, a cathode electrode(30) which is installed opposite to the anode electrode in the plating bath and connected to a work piece(6), a heating unit(40) which heats the work piece, and a jacket(50) which allows the plating liquid to pass through and accommodates the work piece and the heating unit.
Abstract translation: 目的：提供电镀装置，通过提高工件的温度来提高电镀速度，以提高电镀电流的效率。 构成：电镀装置包括容纳电镀液（5）的电镀槽（10），安装在电镀槽中的阳极电极（20），与镀层中的阳极电极相对设置的阴极电极（30） 连接到工件（6），加热工件的加热单元（40）和允许电镀液通过并容纳工件和加热单元的护套（50）。
-
公开(公告)号：KR1020100083956A
公开(公告)日：2010-07-23
申请号：KR1020090003306
申请日：2009-01-15
Applicant: 삼성전기주식회사
CPC classification number: B26F1/40 , B26F2210/08 , H05K3/40
Abstract: PURPOSE: A punching jig is provided to form via holes with uniform angle and smooth interior surface in a printed circuit board, thereby preventing void and seam effectively. CONSTITUTION: A punching jig(100) for forming via holes in a printed circuit board comprises a lower plate(110) and an upper plate(120). The lower plate has a plurality of first protrusions(113) in a hollow cone shape and press fitted to the underside of the printed circuit board to punch holes. The lower plate also has a plurality of first protrusions at regular intervals on the top surface, and an opening(111) is formed on the top of each first protrusion. The upper plate has a plurality of second protrusions(123) in an inverse cone shape at the position corresponding to the first protrusions and press fitted to the top surface of the printed circuit board to punch holes.
Abstract translation: 目的：提供冲压夹具，以形成印刷电路板中具有均匀角度和平滑内表面的通孔，从而有效地防止空隙和接缝。 构成：用于在印刷电路板中形成通孔的冲压夹具（100）包括下板（110）和上板（120）。 下板具有中空圆锥形状的多个第一突起（113），并且压配合到印刷电路板的下侧以冲孔。 下板还在顶面上具有规则间隔的多个第一突起，并且在每个第一突起的顶部上形成开口（111）。 上板在对应于第一突起的位置处具有反锥形的多个第二突起（123），并且压配合到印刷电路板的顶表面以冲孔。
-
公开(公告)号：KR1020090089062A
公开(公告)日：2009-08-21
申请号：KR1020080014405
申请日：2008-02-18
Applicant: 삼성전기주식회사
CPC classification number: H05K3/107 , H05K3/0023 , H05K3/045 , H05K3/423 , H05K3/426 , H05K2201/0376 , H05K2201/09563 , H05K2203/0353 , Y10T29/49126 , Y10T29/49165
Abstract: A printed circuit board and a manufacturing method thereof are provided to simplify a manufacturing process by forming a circuit pattern, a via land, and a via at the same time when forming a conductive material. A first insulating material is provided(S100). A second insulating material is stacked on the first insulating material(S200). The second insulating material is made of the photosensitive material. A via hole is formed by passing through the first insulating material and the second insulating material by a drill process(S300). A shape of a circuit pattern and a via land is transferred to the second insulating material(S400). The second insulating material is selectively exposed(S410). The second insulating material is selectively removed by a developing process(S420). The conductive material is formed in the shape of the circuit pattern and the via land, and the inner part of the via hole(S500).
Abstract translation: 提供一种印刷电路板及其制造方法，以在形成导电材料的同时形成电路图案，通孔接合区和通孔来简化制造过程。 提供第一绝缘材料（S100）。 第二绝缘材料层叠在第一绝缘材料（S200）上。 第二绝缘材料由感光材料制成。 通过穿过第一绝缘材料和第二绝缘材料通过钻孔工艺形成通孔（S300）。 将电路图形和通路接合面的形状转移到第二绝缘材料（S400）。 选择性地暴露第二绝缘材料（S410）。 通过显影处理选择性地去除第二绝缘材料（S420）。 导电材料形成为电路图案和通孔接合区以及通孔的内部部分（S500）。
-
公开(公告)号：KR1020090066781A
公开(公告)日：2009-06-24
申请号：KR1020070134476
申请日：2007-12-20
Applicant: 삼성전기주식회사
IPC: H05K3/42
CPC classification number: H05K3/429 , H05K1/0216 , H05K2201/09563
Abstract: A manufacturing method of a printed circuit board is provided to reduce signal noise generated from a via hole by improving interfacial cohesive power of a circuit pattern and enhancing heat-radiating characteristics of a printed circuit board. A disk(10) including a laminated structure of copper foils(4) is prepared on both sides of an insulating layer(2). A via hole is formed in the disk. A first copper plating layer(8) is formed on an inner wall of the via hole and the copper foils. The inside of the via hole is filled with a conductive paste(12). A second copper plating layer(14) is formed in the inside of the via hole in which the conductive paste are not filled up. The second copper plating layer is formed on the first copper plating layer. A circuit pattern is formed on both sides of the disk.
Abstract translation: 提供一种印刷电路板的制造方法，通过提高电路图案的界面粘结力和提高印刷电路板的散热特性来降低从通孔产生的信号噪声。 在绝缘层（2）的两侧制备包括铜箔（4）的叠层结构的盘（10）。 在盘中形成通孔。 在通孔的内壁和铜箔上形成第一镀铜层（8）。 通孔的内部填充有导电膏（12）。 第二镀铜层（14）形成在导电膏没有填充的通孔的内部。 第二镀铜层形成在第一镀铜层上。 电路图案形成在盘的两侧。
-
公开(公告)号：KR100660027B1
公开(公告)日：2006-12-20
申请号：KR1020060007540
申请日：2006-01-25
Applicant: 삼성전기주식회사
IPC: H05K3/18
Abstract: A method of manufacturing a printed circuit board using an electrolytic plating lead is provided to reduce the variation of a plating thickness by distributing a high-intensity electric field by uniformly adjusting electric field intensity from an anode of a plating tub. A BVH(Blind Via Hole)(310) is formed on a core layer(300) of a substrate. A first plating layer(320a,320b) is formed by using an electroless chemical plating. A first dry film(330) is applied on the first plating layer. The first dry film is an etching resist used during forming an electrolytic plating lead. The first plating layer is removed from a region except for a region protected by the first dry film. The first dry film is peeled, and a second plating layer(340) is formed on a region corresponding to the electrolytic plating lead. A second dry film(350) is formed on the second plating layer. The second dry film is exposed to light and developed according to a circuit pattern to be formed. The circuit is formed on a PCB(Printed Circuit Board) using etching. The second dry film is peeled after the etching process.
Abstract translation: 提供一种使用电解电镀引线制造印刷电路板的方法，以通过均匀调节来自电镀槽阳极的电场强度来分布高强度电场来减少电镀厚度的变化。 BVH（盲孔）（310）形成在衬底的芯层（300）上。 第一镀层（320a，320b）通过使用无电化学镀形成。 第一干膜（330）被施加在第一镀层上。 第一干膜是在形成电解电镀引线期间使用的抗蚀剂。 从除了由第一干膜保护的区域以外的区域去除第一镀层。 将第一干膜剥离，并且在对应于电解电镀引线的区域上形成第二电镀层（340）。 第二干膜（350）形成在第二镀层上。 将第二干膜曝光并根据要形成的电路图案显影。 该电路使用蚀刻在PCB（印刷电路板）上形成。 蚀刻工序后，将第二干膜剥离。
-
Patent Agency Ranking
公开(公告)号：KR101077377B1
公开(公告)日：2011-10-26
申请号：KR1020090111681
申请日：2009-11-18
Applicant: 삼성전기주식회사
Abstract: 본발명은기판제조용캐리어부재및 이를이용한기판의제조방법에관한것으로, 본발명에따른기판제조용캐리어부재를이용한기판의제조방법은 (A) 베이스기판의일면또는양면에절연재를적층하고, 상기절연재보다작은면적으로형성된이형층을상기절연재의일면에배치하는단계, (B) 상기이형층의일면에금속층을배치하고가압및 가열공정을통해서상기이형층을상기절연재의일면에매립시키고, 상기금속층의테두리를상기절연재로접착시켜기판제조용캐리어부재를제공하는단계, (C) 상기금속층의일면에빌드업층을형성한후 상기빌드업층과상기기판제조용캐리어부재를관통하는홀을가공하는단계및 (D) 상기홀에기체를주입하여상기금속층을상기이형층으로부터분리시키는단계를포함하여구성되며, 홀을가공하여홀에기체를주입함으로써캐리어부재로부터빌드업층을분리하므로라우팅공정을수행할필요가없고, 빌드업층과캐리어부재의크기가유지되는장점이있다.
Abstract translation: 本发明是，根据本发明（A）使用用于制造承载构件的衬底的衬底的制造方法，层压在一个由绝缘材料或基底基板的两面，和绝缘材料用于制造承载构件的，并使用相同的制造衬底的方法的基板 （B）在释放层的一个表面上设置金属层，并通过压制和加热工艺在绝缘材料的一个表面上填充释放层; （C）在所述金属层的一侧上形成积层，然后机械加工穿过所述积层和用于制造所述衬底的所述载体元件的孔，以及 D）将气体注入孔中以将金属层与释放层分离，其中通过加工孔将气体注入孔中， 由于分离层不是必需的执行路由处理，具有这样的堆积层和载体大小bujaeui保持的优点。
-
公开(公告)号：KR100965341B1
公开(公告)日：2010-06-22
申请号：KR1020070134476
申请日：2007-12-20
Applicant: 삼성전기주식회사
IPC: H05K3/42
Abstract: 본 발명은 비아홀 내벽 및 중심부에 도전성 페이스트를 충진하고 도전성 페이스트가 충진되지 않은 비아홀 내부를 필 도금하여 비아홀에 형성되는 회로패턴의 계면 밀착력을 향상시킴과 아울러 인쇄회로기판의 방열 특성을 향상시키고, 비아홀에서 발생 되는 신호 노이즈를 줄이며, 비아홀 충진 시 발생 되는 보이드나 딤플을 방지하고 이종 금속으로 비아홀을 충진하여 인쇄회로기판의 제조 시간을 줄여 생산성을 향상시킬 수 있는 인쇄회로기판의 제조방법에 관한 것이다.
인쇄회로기판, 도전성 페이스트, 충진, 필 도금-
公开(公告)号：KR1020100052259A
公开(公告)日：2010-05-19
申请号：KR1020080111199
申请日：2008-11-10
Applicant: 삼성전기주식회사
CPC classification number: H05K3/4046 , H05K1/115 , H05K3/0023 , H05K3/429 , H05K2201/09563
Abstract: PURPOSE: A printed circuit board with a buried circuit pattern and a manufacturing method thereof are provided to form an intaglio pattern of a via hole and a circuit layer through an exposure process and a development process using a photosensitive insulation material. CONSTITUTION: A base substrate includes a first insulation material(100). A via hole is formed on the first insulation material. A second insulation material(300) is formed on one side or both sides of the base substrate. The second insulation material is made of photosensitive materials. The second insulation material has an opening unit for forming a circuit layer and a penetration hole corresponding to a via hole. A metal layer is formed on the first insulation material and the second insulation material to fill the opening unit, the penetration hole and the via hole. The metal layer is removed in the thickness direction to expose the upper side of the second insulation layer.
Abstract translation: 目的：提供具有掩埋电路图案的印刷电路板及其制造方法，以通过曝光工艺和使用感光绝缘材料的显影处理形成通孔和电路层的凹版图案。 构成：基底衬底包括第一绝缘材料（100）。 在第一绝缘材料上形成通孔。 第二绝缘材料（300）形成在基底基板的一侧或两侧。 第二绝缘材料由感光材料制成。 第二绝缘材料具有用于形成电路层的开口单元和对应于通孔的穿透孔。 在第一绝缘材料和第二绝缘材料上形成金属层以填充开口单元，穿透孔和通孔。 在厚度方向上去除金属层以露出第二绝缘层的上侧。
-
公开(公告)号：KR100770445B1
公开(公告)日：2007-10-26
申请号：KR1020060075092
申请日：2006-08-09
Applicant: 삼성전기주식회사
IPC: H03K19/0175 , H03K19/0948
CPC classification number: H03K19/018514
Abstract: A CML(Current Mode Logic) CMOS(Complementary Metal Oxide Semiconductor) converter is provided to perform full swing from a high level to a low level, by controlling an output voltage of the CML CMOS converter by using an inverter equal to an inverter operating by receiving the output voltage of the CML CMOS converter. An input stage(110) is turned on/off by receiving an input voltage from the outside. A voltage control unit(120) outputs a constant voltage. A first switching unit(M1) is connected to the input stage and the voltage control unit, and is turned on/off by a constant voltage applied from the voltage control unit. A second switching unit(M2) is connected to the input stage, and is turned on/off by a signal applied from the input stage.
Abstract translation: 提供CML（电流模式逻辑）CMOS（互补金属氧化物半导体）转换器，通过使用与逆变器相同的逆变器来控制CML CMOS转换器的输出电压，以从高电平到低电平进行全摆幅 接收CML CMOS转换器的输出电压。 通过从外部接收输入电压来使输入级（110）接通/断开。 电压控制单元（120）输出恒定电压。 第一开关单元（M1）连接到输入级和电压控制单元，并且通过从电压控制单元施加的恒定电压来接通/断开。 第二开关单元（M2）连接到输入级，并通过从输入级施加的信号导通/截止。
-
公开(公告)号：KR1020140074637A
公开(公告)日：2014-06-18
申请号：KR1020120142817
申请日：2012-12-10
Applicant: 삼성전기주식회사
Abstract: Disclosed are a multilayer printed circuit board and a manufacturing method thereof. The multilayer printed circuit board manufacturing method includes the following steps of: (a) forming an inner layer circuit pattern on an inner layer substrate with first metal; (b) laminating a barrier layer on the surface of the inner layer circuit pattern with second metal; (c) laminating an outer layer substrate on the inner substrate in order to cover the inner layer circuit pattern; (d) making a part of the barrier layer exposed by perforating a via hole on the outer layer substrate; (e) making the inner circuit pattern exposed by removing the exposed barrier layer; and (f) filling the via hole. The multilayer printed circuit board manufacturing method is able to protect an inner layer pad when removing an outer layer copper film by plating the inner layer pad with a material which is not etched by copper (Cu) etching solution including nickel (Ni). Like the forementioned, a dimple which can be generated on the outer layer can be stably managed by protecting the inner layer pad.
Abstract translation: 公开了一种多层印刷电路板及其制造方法。 多层印刷电路板的制造方法包括以下步骤：（a）在第一金属的内层基板上形成内层电路图案; （b）用第二金属在内层电路图案的表面上层叠阻挡层; （c）在内部基板上层叠外层基板以覆盖内层电路图案; （d）通过在外层基板上穿孔通孔而使阻挡层的一部分暴露出来; （e）通过去除暴露的阻挡层使内部电路图案暴露; 和（f）填充通孔。 多层印刷电路板的制造方法能够通过用不含铜（Cu）蚀刻溶液（包括镍（Ni））蚀刻的材料对内层焊盘进行镀覆来除去外层铜膜来保护内层焊盘。 如前所述，通过保护内层垫可以稳定地管理在外层上产生的凹坑。
-
-
-
-
-
-
-
-
-
Search Results
27
records
(took 0.022 seconds)
