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公开(公告)号：KR1020140133401A
公开(公告)日：2014-11-19
申请号：KR1020130162829
申请日：2013-12-24
Applicant: 삼성전기주식회사
IPC: G06F3/041
CPC classification number: G06F3/041
Abstract: 본 발명의 일실시예에 따른 터치센서는 투명기판 및 상기 투명기판상에 형성되는 전극패턴을 포함하고, 상기 전극패턴은 적어도 둘 이상의 전극층이 적층되어 형성될 수 있다. 본 발명에 따르면, 전극패턴을 적어도 둘 이상의 전극층으로 형성함으로써, 전극패턴의 내부식성 및 시인특성을 향상시키고, 투명기판과 전극패턴의 접착신뢰성을 확보할 수 있는 효과가 있다.
Abstract translation: 根据本发明的实施例，触摸传感器包括透明基板和形成在透明基板上的电极图案，其中电极图案可以通过层叠两个或更多个电极层而形成。 根据本发明，通过使用至少两个电极层形成电极图案，从而提高电极图案的耐腐蚀性和可见特性，并确保透明基板与电极图案的接合的可靠性。
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公开(公告)号：KR101047139B1
公开(公告)日：2011-07-07
申请号：KR1020090108718
申请日：2009-11-11
Applicant: 삼성전기주식회사
IPC: H01L21/60
CPC classification number: H05K3/00 , H01L2224/16225 , H05K3/30 , Y10T29/49124
Abstract: 단층 보드온칩 패키지 기판 및 그 제조방법이 개시된다. 상기 단층 보드온칩 패키지 기판은, 절연체; 상기 절연체의 상면에 마련되는 회로패턴 및 플립칩 본딩 패드; 상기 회로패턴의 하면과 접촉하며, 상기 절연체를 관통하는 도전성 범프; 상기 플립칩 본딩 패드의 적어도 일부가 노출되도록, 상기 절연체의 상면에 형성되는 솔더레지스트층; 및 전자소자와의 플립칩 접속을 위해, 상기 플립칩 본딩 패드의 상면에 마련되는 플립칩 본딩 범프를 포함한다.
단층, 보드온칩-
公开(公告)号：KR1020110051902A
公开(公告)日：2011-05-18
申请号：KR1020090108718
申请日：2009-11-11
Applicant: 삼성전기주식회사
IPC: H01L21/60
CPC classification number: H05K3/00 , H01L2224/16225 , H05K3/30 , Y10T29/49124
Abstract: PURPOSE: A board on chip package substrate and manufacturing method thereof are provided to obtain a larger number of input/output paths by flip chip type connection, thereby realizing high densification. CONSTITUTION: A circuit pattern(12) and a flip chip bonding pad(14) are formed on an insulator(10). A conductive bump(15) contacts the bottom of the circuit pattern. A solder resist layer(20) is formed on the insulator. A flip chip bonding pump is formed on the flip chip bonding pad. A solder ball(50) is coupled with the bottom of a conductive bump penetrating the insulator.
Abstract translation: 目的：提供一种片上封装基板及其制造方法，以通过倒装芯片型连接获得更多数量的输入/输出路径，从而实现高致密化。 构成：在绝缘体（10）上形成电路图案（12）和倒装芯片焊盘（14）。 导电凸块（15）接触电路图案的底部。 在绝缘体上形成阻焊层（20）。 在倒装芯片接合焊盘上形成倒装焊接泵。 焊球（50）与穿过绝缘体的导电凸块的底部耦合。
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公开(公告)号：KR1020110047795A
公开(公告)日：2011-05-09
申请号：KR1020090104562
申请日：2009-10-30
Applicant: 삼성전기주식회사
IPC: H05K3/40
CPC classification number: H05K3/4007 , H05K3/061 , H05K3/205 , H05K2201/0367 , H05K2203/0152 , H05K2203/0376
Abstract: PURPOSE: A method for manufacturing a printed circuit board with a bump is provided to prevent a low bump by reducing the height difference between the cross section of the bump on the printed circuit board and the adjacent bump. CONSTITUTION: A first circuit(115) is formed on the surface of a first carrier. A second circuit(125) is formed on the surface of a second carrier. The first carrier is compressed on one side of an insulation layer(130) to bury the first circuit. An etching resist is stacked on the first carrier corresponding to the area to form a bump(110'). The bump is formed by etching the first carrier.
Abstract translation: 目的：提供一种用于制造具有凸块的印刷电路板的方法，以通过减小印刷电路板上的凸块的横截面与相邻凸块之间的高度差来防止低凸起。 构成：在第一载体的表面上形成第一电路（115）。 第二电路（125）形成在第二载体的表面上。 第一载体在绝缘层（130）的一侧被压缩以埋置第一电路。 在对应于该区域的第一载体上层叠抗蚀剂以形成凸块（110'）。 通过蚀刻第一载体形成凸块。
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Patent Agency Ranking
公开(公告)号：KR1020140122841A
公开(公告)日：2014-10-21
申请号：KR1020130039762
申请日：2013-04-11
Applicant: 삼성전기주식회사
IPC: G03F7/20 , H01L21/027
CPC classification number: G03F7/2018 , H01L21/0274
Abstract: 본 발명의 일실시예에 따른 가공시스템 모듈이 개시된다. 필름이 장착된 투입장치와 상기 투입장치가 내부에 배치되고 청정도를 유지하기 위한 제1 밀폐공간을 구비하는 투입모듈과 투입모듈의 일측에 배치되고 상기 필름이 이송되어 가공하는 가공장치와 상기 가공장치가 내부에 배치되고 청정도를 유지하기 위한 제2 밀폐공간을 구비하는 가공모듈 및 가공모듈의 타측에 배치되고 가공된 필름을 인계받는 반출장치와 상기 반출장치가 내부에 배치되고 청정도를 유지하기 위한 제3 밀폐공간을 구비하는 반출모듈을 포함하고,제2 밀폐공간은 제3 밀폐공간보다 청정도가 높게 유지되는 것을 특징으로 하는 가공시스템 모듈을 제공한다.
Abstract translation: 根据本发明的一个实施例，公开了一种处理系统模块。 所述处理系统模块包括输入模块，该输入模块具有带有胶片的输入装置和布置在输入装置中并保持清洁度的第一气密空间; 处理装置，其布置在所述输入模块的一侧并处理被输送的膜; 处理模块，其具有具有处理装置并保持清洁度的第二气密空间; 传送装置，布置在处理模块的另一侧并接收加工膜; 以及具有第三气密空间的转印模块，其具有转印装置并保持清洁。 第二个密封空间保持比第三个气密空间高的清洁度。
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公开(公告)号：KR1020140080038A
公开(公告)日：2014-06-30
申请号：KR1020120149402
申请日：2012-12-20
Applicant: 삼성전기주식회사
CPC classification number: G06F3/041 , G06F3/0418 , G06F2203/04107 , G02F1/13338 , H01B5/14
Abstract: A touch panel, according to an embodiment of the present invention, blocks noise generated by a display coupled to the touch pattern by separately forming a soundproof layer between a transparent substrate and electrode patterns. Also, a first electrode pattern and a second electrode pattern are formed to intersect each other on the same surface of the transparent substrate through a bridge electrode pattern, formed by patterning the soundproof layer, and a bridge insulation pattern patterned on an insulation layer formed on the soundproof layer. Accordingly, the stability of electrical connections between each electrode pattern is ensured.
Abstract translation: 根据本发明的实施例的触摸面板通过在透明基板和电极图案之间分开形成隔音层来阻止由耦合到触摸图案的显示器产生的噪声。 此外，第一电极图案和第二电极图案被形成为通过桥接电极图案在透明基板的相同表面上彼此相交，所述桥接电极图案通过图案化隔声层而形成，并且在绝缘层上图案化的桥接绝缘图案形成在 隔音层。 因此，确保了每个电极图案之间的电连接的稳定性。
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公开(公告)号：KR101141209B1
公开(公告)日：2012-05-04
申请号：KR1020100009192
申请日：2010-02-01
Applicant: 삼성전기주식회사
CPC classification number: H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
Abstract: A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.
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公开(公告)号：KR1020110089687A
公开(公告)日：2011-08-09
申请号：KR1020100009192
申请日：2010-02-01
Applicant: 삼성전기주식회사
CPC classification number: H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
Abstract: PURPOSE: A single layered printed circuit board and a manufacturing method thereof are provided to implement high integration of the device while saving manufacturing costs. CONSTITUTION: A single layered printed circuit board and a manufacturing method thereof are comprised of steps: forming a bond pad, circuit pattern, and a post on an insulating film(S110); pressing an insulator in the surface of the insulating film(S120); selectively etching insulator to expose the end of the post(S130); opening a part of the insulating film to expose at least part of a bond pad to outside(S140); combining a solder ball in the end of the post; and mounting a electronic device on the insulator to be contacted with the exposed bonding pad(S150).
Abstract translation: 目的：提供单层印刷电路板及其制造方法，以实现装置的高集成度，同时节省制造成本。 构成：单层印刷电路板及其制造方法包括以下步骤：在绝缘膜上形成接合焊盘，电路图案和柱（S110）; 在绝缘膜的表面压制绝缘体（S120）; 选择性地蚀刻绝缘体以露出柱的端部（S130）; 打开绝缘膜的一部分以将至少部分接合垫暴露于外部（S140）; 在柱的末端组合焊球; 以及将电子器件安装在绝缘体上以与暴露的焊盘接触（S150）。
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公开(公告)号：KR1020110081796A
公开(公告)日：2011-07-14
申请号：KR1020110062256
申请日：2011-06-27
Applicant: 삼성전기주식회사
IPC: H01L21/60
CPC classification number: H01L24/97 , H01L2224/48091 , H01L2224/4824 , H01L2924/15311 , H01L2924/00014
Abstract: PURPOSE: A manufacturing method for a ball grid array board and a semiconductor chip package are provided to implement high density circuit pattern by burying a circuit pattern in an insulating layer. CONSTITUTION: In a manufacturing method for a ball grid array board and a semiconductor chip package, a first circuit pattern and a second circuit pattern are formed respectively on a metal carrier and a second metal carrier. A fist side(111) is laminated to be contacted to a release material(150) which is formed between a first side and the second side(112), which are opposite to each other. The first and the second circuit pattern are buried the second side of the first and second insulating layers respectively. The first and the second metal carrier are eliminated. The release material is removed to divide the first and second insulation layers. An opening is formed in the first and second insulting layers respectively to connect the first side to the second side.
Abstract translation: 目的：提供一种用于球栅阵列板和半导体芯片封装的制造方法，以通过将电路图案埋入绝缘层来实现高密度电路图案。 构成：在球栅阵列板和半导体芯片封装的制造方法中，分别在金属载体和第二金属载体上形成第一电路图案和第二电路图案。 第一侧（111）层叠以与形成在彼此相对的第一侧和第二侧（112）之间的释放材料（150）接触。 第一和第二电路图案分别埋在第一和第二绝缘层的第二侧。 第一和第二金属载体被去除。 去除剥离材料以分隔第一和第二绝缘层。 分别在第一和第二绝缘层中形成开口以将第一侧连接到第二侧。
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