公开(公告)号：KR1020090063729A

公开(公告)日：2009-06-18

申请号：KR1020070131200

申请日：2007-12-14

Applicant: 삼성전자주식회사

Inventor： 박형근 ,  맹동조 ,  정헌주

IPC: H01L21/304 ,  H01L21/02 ,  H01L21/67

CPC classification number: H01L21/67051 ,  B05B17/06

Abstract: An apparatus for manufacturing a semiconductor device is provided to increase productivity of the semiconductor devices by cleaning and drying two semiconductor devices at the same time. An upper bowl(100a) and a lower bowl(100b) are symmetrically installed. A circular semiconductor substrate is positioned inside the upper and lower bowls. The inner space is formed by coupling the upper and lower bowls symmetrically. The upper and lower bowls prevent the dispersion of the solution from the upper semiconductor substrate due to the rotation of the semiconductor device. An exhaust line(104) is installed in the lower bowl for collecting the solution. The exhaust line(102) is formed in the upper bowl for discharging the gas. A slit(101) is formed in one side of the combining surface of the upper and lower bowls. A cleaning unit(200) enters the inside of the bowls through the slit.

Abstract translation: 提供一种用于制造半导体器件的装置，以通过同时清洁和干燥两个半导体器件来提高半导体器件的生产率。 上碗（100a）和下碗（100b）对称地安装。 圆形半导体衬底位于上碗和下碗内。 内部空间通过对称地连接上碗和下碗来形成。 上下碗由于半导体器件的旋转而防止溶液从上半导体衬底分散。 排气管（104）安装在下碗中以收集溶液。 排气管（102）形成在上碗中以排出气体。 在上碗和下碗的组合表面的一侧形成狭缝（101）。 清洁单元（200）通过狭缝进入碗的内部。

公开(公告)号：KR1020080065836A

公开(公告)日：2008-07-15

申请号：KR1020070002980

申请日：2007-01-10

Applicant: 삼성전자주식회사

Inventor： 박형근 ,  박찬식 ,  맹동조 ,  김한식 ,  정헌주

IPC: H01L21/304

Abstract: An apparatus for cleaning a substrate is provided to simultaneously supply chemicals and nitrogen gas to the surface of a substrate through a cleaning fluid supplying member by incorporating a cleaning fluid supplying member and an ultrasonic vibrator. A substrate is placed on a substrate support member(100) capable of rotating. A fluid supply member(200) supplies cleaning fluid to the surface of the substrate placed on the substrate support member. An ultrasonic vibrator(300) generates vibration in the fluid supply member to apply ultrasonic vibration to the cleaning fluid. A plurality of injection holes arranged as a lattice type are formed in the fluid supply member, injecting the cleaning fluid to the surface of the substrate.

Abstract translation: 提供一种清洗基板的装置，通过并入清洗液供给部件和超声波振子，通过清洗液供给部件同时向基板的表面供给化学物质和氮气。 将衬底放置在能够旋转的衬底支撑构件（100）上。 流体供给构件（200）将清洁流体供给到放置在基板支撑构件上的基板的表面。 超声波振动器（300）在流体供给构件中产生振动以对清洁流体施加超声波振动。 在流体供给部件中形成有排列成格子状的多个喷射孔，将清洗液喷射到基板的表面。

公开(公告)号：KR1020080063943A

公开(公告)日：2008-07-08

申请号：KR1020070000576

申请日：2007-01-03

Applicant: 삼성전자주식회사

Inventor： 박형근 ,  맹동조

IPC: H01L21/304

Abstract: Wet station equipment is provided to improve the efficiency of a chemical process and a rinse process with respect to a wafer by supplying chemicals or deionized water to the whole surface of wafers. Wafers are selectively located in a bath(100) to be slopped. A spraying unit(200) is arranged on an upper portion of the bath to spray chemicals. A chemical supplying unit(300) is communicated with the spraying unit to supply the chemicals to the spraying unit. A chemical circulating unit(400) stores the chemicals passing through the bath. The chemical circulating unit filters the chemicals to supply them to the spraying unit. The wafers are connected to a sloping guidance unit. The guidance unit has a wafer guide(151), an elevator, a motor, and a motor controller(154). The elevator is installed on an end of the wafer guide to elevate the wafer guide. The motor connects the wafer guide to the elevator to rotate the wafer guide. The motor controller drives the motor.

Abstract translation: 提供湿站设备，以通过向晶片的整个表面提供化学品或去离子水来提高化学过程的效率和相对于晶片的漂洗过程。 晶片选择性地位于浴（100）中以被倾斜。 喷淋单元（200）布置在浴的上部以喷洒化学品。 化学品供给单元（300）与喷雾单元连通以将化学品供给到喷雾单元。 化学循环单元（400）存储通过浴的化学品。 化学循环单元过滤化学品以将其供应到喷涂单元。 晶片连接到倾斜引导单元。 引导单元具有晶片引导件（151），电梯，马达和马达控制器（154）。 升降机安装在晶片引导件的一端以升高晶片引导件。 电机将晶片引导件连接到电梯以旋转晶片引导件。 电机控制器驱动电机。

公开(公告)号：KR1020070109635A

公开(公告)日：2007-11-15

申请号：KR1020060042910

申请日：2006-05-12

Applicant: 삼성전자주식회사

Inventor： 박준모 ,  맹동조

IPC: H01L21/304

Abstract: A wafer surface cleaning apparatus and a method for cleaning a nozzle arm and a surface of a wafer are provided to enhance productivity by simplifying a manufacturing process and lowering an error rate. A wafer surface cleaning apparatus includes a chamber wall(110), a rotary shaft(120), a chuck(130) positioned on an upper part of the rotary shaft to load a wafer on an upper surface thereof, an injection hole(160) formed in the inside of the chuck to inject gas or liquid onto a bottom surface of the wafer, and a nozzle arm(180) for injecting the gas, water, and chemicals onto the surface of the wafer loaded on the upper surface of the chuck. The nozzle arm includes a plurality of unit nozzles. The chuck includes a wafer supporting ring and a plurality of wafer fixing pins.

Abstract translation: 提供晶片表面清洁装置和用于清洁喷嘴臂和晶片表面的方法，以通过简化制造过程并降低误差率来提高生产率。 一种晶片表面清洁装置，包括：室壁（110），旋转轴（120），位于旋转轴的上部的卡盘（130），用于在其上表面上加载晶片;喷射孔（160） 形成在卡盘的内部以将气体或液体注入到晶片的底表面上，以及用于将气体，水和化学品喷射到装载在卡盘的上表面上的晶片的表面上的喷嘴臂（180） 。 喷嘴臂包括多个单元喷嘴。 卡盘包括晶片支撑环和多个晶片固定销。

公开(公告)号：KR1020020067795A

公开(公告)日：2002-08-24

申请号：KR1020010008139

申请日：2001-02-19

Applicant: 삼성전자주식회사

Inventor： 황성만 ,  박형무 ,  맹동조 ,  이혜령 ,  박호우

IPC: H01L29/78

CPC classification number: H01L21/823835 ,  H01L21/823814 ,  H01L21/823864

Abstract: PURPOSE: A method for fabricating a metal-oxide-semiconductor(MOS) transistor with a lightly-doped-drain(LDD) structure is provided to reduce thermal budget of a low density source/drain region by forming a high density source/drain region prior to the low density source/drain region, and to increase the area of silicide by forming a structure having no spacer. CONSTITUTION: A semiconductor substrate(110) is prepared. A gate electrode(140A,140B) is formed on the semiconductor substrate. A spacer is formed on both sidewalls of the gate electrode. The first impurity region(190) of the first density is formed in the semiconductor substrate at both sides of the spacer. The spacer is eliminated. The second impurity region(200) of the second density lower than the first density is formed in the semiconductor substrate at both sides of the gate electrode exposed when the spacer is removed.

Abstract translation: 目的：提供一种制造具有轻掺杂漏极（LDD）结构的金属氧化物半导体（MOS）晶体管的方法，以通过形成高密度源极/漏极区域来降低低密度源极/漏极区域的热预算 在低密度源极/漏极区域之前，并且通过形成不具有间隔物的结构来增加硅化物的面积。 构成：制备半导体衬底（110）。 在半导体衬底上形成栅电极（140A，140B）。 在栅电极的两个侧壁上形成间隔物。 第一密度的第一杂质区域（190）形成在间隔物的两侧的半导体衬底中。 间隔物被消除。 第二密度低于第一密度的第二杂质区域（200）形成在半导体衬底中，当去除间隔物时，露出的栅电极的两侧。

公开(公告)号：KR1020000020880A

公开(公告)日：2000-04-15

申请号：KR1019980039671

申请日：1998-09-24

Applicant: 삼성전자주식회사

Inventor： 이광열 ,  이동훈 ,  맹동조

IPC: H01L21/3063

Abstract: PURPOSE: A wet etching station for fabricating semiconductor devices is provided to improve uniformity of a wafer and operation rate by constantly controlling the flow of chemical solutions using a height controller of the chemical solution. CONSTITUTION: A wet etcher comprises a bath(11) for accepting chemical solutions, a supply part(13) for supplying the chemical solutions to the bath(11), a circuitry part(16) for recovering the chemical solutions exhausted from the bath(11) and re-supplying to the bath, and a height controller(21) for controlling a height of the surface of the chemical solutions by controlling an aperture of an exhaust hole(12). The height controller is formed at side walls of the bath(11). The controller(21) further includes a control plate(22) for operating open/close of the exhaust hole(12) and a fixing unit(23) for fixing the control plate(22) to the side walls of the bath.

Abstract translation: 目的：提供一种用于制造半导体器件的湿蚀刻站，以通过使用化学溶液的高度控制器不断控制化学溶液的流动来改善晶片的均匀性和操作速率。 构成：湿蚀刻机包括用于接受化学溶液的浴（11），用于将化学溶液供应到浴（11）的供应部分（13），用于回收从浴排出的化学溶液的电路部分（16） 11），并且重新供应到所述浴中;以及高度控制器（21），其通过控制排气孔（12）的孔径来控制所述化学溶液的表面的高度。 高度控制器形成在浴（11）的侧壁处。 控制器（21）还包括用于操作排气孔（12）的打开/关闭的控制板（22）和用于将控制板（22）固定到浴槽的侧壁的定影单元（23）。

公开(公告)号：KR1020130049903A

公开(公告)日：2013-05-15

申请号：KR1020110114940

申请日：2011-11-07

Applicant: 삼성전자주식회사

Inventor： 박진우 ,  양전위안 ,  김영은 ,  박은미 ,  맹동조 ,  노홍조 ,  박민아

IPC: H01L21/302

CPC classification number: H01L21/67051

Abstract: PURPOSE: A substrate cleaning method and a substrate cleaning apparatus are provided to minimize a splash by moving cleaning solutions to the peripheral area of a substrate. CONSTITUTION: A substrate is fixed to a rotatable support stand(S100). The substrate is rotated through a first nozzle. A first impurity is separated by supplying cleaning solutions to the substrate(S200). A second impurity is separated by simultaneously supplying the cleaning solutions and a 2 fluid mixture(S300). The cleaning solution and the 2 fluid mixture are removed from the substrate(S400). [Reference numerals] (AA) Start; (BB) End; (S100) Step of fixing a substrate with a washing target processed product to a support; (S200) Step of separating a first impurity from the substrate by supplying cleaning solutions through a first nozzle; (S300) Step of separating a second impurity, which is not separated from the substrate, by the cleaning solutions by simultaneously supplying the cleaning solutions and a 2 fluid mixture through a second nozzle; (S400) Step of removing the cleaning solutions and the 2 fluid mixture including the first and second impurities from the substrate

Abstract translation: 目的：提供基板清洗方法和基板清洁装置，以通过将清洁溶液移动到基板的周边区域来最小化飞溅。 构成：将基板固定在可旋转支撑台上（S100）。 基板旋转通过第一喷嘴。 通过向基板供给清洗溶液来分离第一杂质（S200）。 通过同时供应清洁溶液和2种流体混合物来分离第二种杂质（S300）。 将清洗溶液和2液体混合物从基材上除去（S400）。 （附图标记）（AA）开始; （BB）结束; （S100）将具有洗涤对象物处理品的基板固定在支撑体上的工序; （S200）通过第一喷嘴供给清洗液从基板分离出第一杂质的工序; （S300）通过同时供给清洗液和通过第二喷嘴的2液体混合物，用清洗液分离不与基板分离的第二杂质的工序; （S400）从基板除去包括第一和第二杂质的清洗液和2液体混合物的步骤

公开(公告)号：KR100714476B1

公开(公告)日：2007-05-07

申请号：KR1020050113818

申请日：2005-11-25

Applicant: 삼성전자주식회사

Inventor： 오준환 ,  맹동조 ,  김순호

IPC: H01L21/28

Abstract: 반도체 장치 및 그 제조 방법이 제공된다. 본 발명의 일 실시예에 따른 반도체 장치는 하부 배선, 하부 배선 상에 형성되며 하부 배선의 상면을 노출시키는 비아홀을 구비하는 층간 절연막, 비아홀의 양 측벽에 형성된 확산 방지막 및 비아홀을 매립하며 상기 하부 배선과 직접적으로 콘택하는 상부 배선을 포함하되, 하부 배선 내에는 비아홀의 연장된 방향에 확산 방지막의 성분을 포함하는 불순물 영역이 형성된다.
구리 배선, 불순물 영역, 확산 방지막, 비저항

Abstract translation: 提供了一种半导体器件及其制造方法。 根据本发明，下部布线，形成在下部布线的一个实施例的半导体器件是埋在层间绝缘膜，扩散防止膜以及通孔具有通孔用于暴露所述下布线的上表面和下布线的通孔形成于所述侧壁的孔 并且，在下部布线中，在扩散阻挡膜的成分的杂质区域形成有过孔的延伸方向。

公开(公告)号：KR100703973B1

公开(公告)日：2007-04-06

申请号：KR1020050066007

申请日：2005-07-20

Applicant: 삼성전자주식회사

Inventor： 오준환 ,  맹동조

IPC: H01L21/28

CPC classification number: H01L21/76849 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76867 ,  H01L21/76886 ,  H01L2924/0002 ,  H01L2924/00

Abstract: 이중 캡핑막을 갖는 반도체 소자의 배선 및 그 형성 방법이 제공된다. 본 발명의 일 실시예에 따른 반도체 소자의 배선은 내부에 홈을 가지는 층간 절연막, 상기 홈 내부에 형성된 금속층, 상기 금속층 상부에 위치한 금속 화합물층, 상기 층간 절연막 상부에 위치한 제1 장벽층, 및 상기 금속 화합물층 및 상기 제1 장벽층 상부에 위치한 제2 장벽층을 포함한다.
금속배선, 금속화합물, 장벽층, 열처리

公开(公告)号：KR1020070010979A

公开(公告)日：2007-01-24

申请号：KR1020050066007

申请日：2005-07-20

Applicant: 삼성전자주식회사

Inventor： 오준환 ,  맹동조

IPC: H01L21/28

CPC classification number: H01L21/76849 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76867 ,  H01L21/76886 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electric line of a semiconductor device having a two-story capping layer and a method for forming the electric line are provided to prevent an operation error of the semiconductor device due to a through-hole by applying a two-story barrier layer and the capping layer of a metal layer on a damascene line. An electric line of a semiconductor device having a two-story capping layer includes an interlayer dielectric(201), a metal layer(207), a metal compound layer(501), a first barrier layer, and a second barrier layer. The interlayer dielectric has a groove therein. The metal layer is formed inside the groove. The metal compound layer is positioned on the metal layer. The first barrier layer is arranged on the interlayer dielectric. The second barrier layer is arranged on the metal compound layer and the first barrier layer. The metal layer contains copper or a copper alloy. The metal compound layer is made of copper or silicon. A thickness of the first barrier layer is 100Š.

Abstract translation: 提供具有二层封盖层的半导体器件的电线和用于形成电线的方法，以通过应用两层阻挡层和封盖来防止由于通孔引起的半导体器件的操作误差 大马士革线上的金属层层。 具有二层盖层的半导体器件的电线包括层间电介质（201），金属层（207），金属化合物层（501），第一势垒层和第二阻挡层。 层间电介质在其中具有凹槽。 金属层形成在凹槽内。 金属化合物层位于金属层上。 第一阻挡层设置在层间电介质上。 第二阻挡层设置在金属化合物层和第一阻挡层上。 金属层含有铜或铜合金。 金属化合物层由铜或硅制成。 第一阻挡层的厚度为100μ。