-
公开(公告)号：KR1020000061813A
公开(公告)日：2000-10-25
申请号：KR1019990011173
申请日：1999-03-31
Applicant: 삼성전자주식회사
IPC: H01L21/304
Abstract: PURPOSE: A manufacturing method of a wafer is to improve the flatness of wafer by grinding the uneven surface of wafer being generated in an etching process after terminating an etching process. CONSTITUTION: A manufacturing method of a wafer comprises: a first lapping step of lapping both sides of the severed wafer; a step of etching the surface of the wafer thus lapped using an etchant; a second lapping step of lapping the surface of wafer thus etched so that it has a desired flatness; and a step of polishing of finely polishing the surface of the wafer thus lapped. The surface of the wafer is lapped more finely in the second lapping step than in the first polishing step.
Abstract translation: 目的：晶片的制造方法是通过在终止蚀刻工艺之后通过研磨在蚀刻工艺中产生的晶片的不平坦表面来提高晶片的平坦度。 构成：晶片的制造方法包括：研磨切断的晶片的两侧的第一研磨步骤; 使用蚀刻剂蚀刻如此研磨的晶片的表面的步骤; 研磨如此蚀刻的晶片的表面以使其具有期望的平坦度的第二研磨步骤; 以及研磨精细研磨如此研磨的晶片的表面的步骤。 在第二研磨步骤中，晶片的表面比第一抛光步骤更细。
-
公开(公告)号：KR1020100063219A
公开(公告)日：2010-06-11
申请号：KR1020080121630
申请日：2008-12-03
Applicant: 삼성전자주식회사
CPC classification number: G06F13/4282 , G06F13/4018 , G06F2213/0038 , Y02D10/14 , Y02D10/151
Abstract: PURPOSE: An apparatus and a method for writing data by a bit unit in a system on chip are provided to transmit a signal for showing bit selection to a partial transmission line among data transmission lines, thereby shortening time for processing data by the bit unit. CONSTITUTION: If a data processing event is generated, a master confirms information about data(601,603). When the size of data is smaller than 16 bits, the master confirms a transmission data line and a non-transmission data line(605,607). The master transmits the data to the transmission data line(609). The master transmits bit information for a bit location for writing the data in the non-transmission data line. When the size of data is 16 bits or greater, the master writes data(611).
Abstract translation: 目的：提供一种用于在片上系统中通过位单位写入数据的装置和方法，用于将数据传输线中的部分传输线显示位选择信号，从而缩短由位单元处理数据的时间。 规定：如果生成数据处理事件，则主器件确认有关数据的信息（601,603）。 当数据大小小于16位时，主器件确认发送数据线和非发送数据线（605,607）。 主机将数据发送到发送数据线（609）。 主设备发送用于将数据写入非传输数据线的位位置的位信息。 当数据大小为16位或更大时，主器件写入数据（611）。
-
公开(公告)号：KR1020090128672A
公开(公告)日：2009-12-16
申请号：KR1020080054534
申请日：2008-06-11
Applicant: 삼성전자주식회사
CPC classification number: G06F9/441 , G06F9/32 , G06F15/7807 , G06F2213/0038
Abstract: PURPOSE: A device and a method for supporting a multi-booting mode are provided to realize fast operation of a chip by advancing boot in an optimal boot time state. CONSTITUTION: A first memory(105) stores a boot code, and supplementary information including boot code length information. An adaptive boot sequencer(120) obtains a boot code length by reading the supplementary information from a predetermined address of the first memory and copies the boot code from the first memory according to the boot code length. The adaptive boot sequencer stores the copied boot code to a second memory(115). A CPU(125) performs a booting operation of an SoC(System on a Chip)(100).
Abstract translation: 目的：提供一种用于支持多引导模式的设备和方法，以通过在最佳引导时间状态下启动引导来实现芯片的快速操作。 构成：第一存储器（105）存储引导代码，以及包括引导代码长度信息的补充信息。 自适应引导定序器（120）通过从第一存储器的预定地址读取补充信息来获得引导代码长度，并根据引导代码长度从第一存储器复制引导代码。 自适应引导定序器将复制的引导代码存储到第二存储器（115）。 CPU（125）执行SoC（片上系统）的引导操作（100）。
-
公开(公告)号：KR1020020009100A
公开(公告)日：2002-02-01
申请号：KR1020000042417
申请日：2000-07-24
Applicant: 삼성전자주식회사
IPC: H01L21/304
Abstract: PURPOSE: A substrate polishing apparatus with a dissipating bubble section is provided to dissipate air bubbles included in wax to a mesh type groove of a polishing plate by using a centrifugal force generated from a rotating polishing head. CONSTITUTION: A substrate polishing apparatus(1) is formed with a couple of polishing heads(2,2'), a driving axis(9), a polishing plate(3), and a polishing pad(7). The polishing heads(2,2') are arranged to an upper portion and a lower portion of the substrate polishing apparatus(1), respectively. The polishing plate(3) is loaded on the upper polishing head(2). The polishing pad(7) is loaded on the lower polishing head(2'). A wafer(6) is loaded on the polishing plate(3). A dissipating bubble section is formed in the polishing plate(3). The dissipating bubble section(4) has a mesh type groove.
Abstract translation: 目的：提供具有消散气泡部分的基板抛光装置，通过使用由旋转抛光头产生的离心力将蜡中包含的气泡向抛光板的网状凹槽中散发。 构成：衬底抛光装置（1）形成有一对抛光头（2,2'），驱动轴（9），抛光板（3）和抛光垫（7）。 抛光头（2,2'）分别设置在基板研磨装置（1）的上部和下部。 抛光板（3）装载在上抛光头（2）上。 抛光垫（7）装载在下抛光头（2'）上。 晶片（6）装载在抛光板（3）上。 在抛光板（3）中形成消散气泡部分。 耗散气泡部分（4）具有网状凹槽。
-
-
Patent Agency Ranking
公开(公告)号：KR101214068B1
公开(公告)日：2012-12-20
申请号：KR1020060010574
申请日：2006-02-03
Applicant: 삼성전자주식회사
Inventor： 홍종혁
IPC: G06F13/28
Abstract: 이를위해채널로직부들이채널들각각에대응한점유요청신호들을발생하고, 제어로직부가채널들의수만큼의유지승인신호들을발생한다. AHB (Advanced High-performance Bus) 마스터는상기채널로직부들에의해발생된점유요청신호들과상기제어로직부에의해발생된유지승인신호들을기반으로버스점유특성을점유형과비점유형중 하나의유형으로결정하는버스점유특성결정신호를발생한다.
-
公开(公告)号：KR1020020033952A
公开(公告)日：2002-05-08
申请号：KR1020000064217
申请日：2000-10-31
Applicant: 삼성전자주식회사
IPC: H01L21/20
Abstract: PURPOSE: A semiconductor epitaxial wafer having a controlled defect distribution is provided to reduce a stack defect or hillock in forming a subsequent epitaxial layer, by sufficiently guaranteeing a denude zone near the surface of a wafer substrate while the wafer substrate where a gettering region having a sufficient gettering effect in a bulk region is distributed is formed. CONSTITUTION: The denude zone(14a,14b) having no crystal defect is formed in a surface region positioned in a predetermined depth from the surface of the wafer substrate(10). The gettering region(12) is formed in the bulk region except the denude zone of the wafer substrate. The epitaxial layer(16) is formed on the wafer substrate. The distribution of the denude zone of the wafer substrate is vertically symmetrical.
Abstract translation: 目的：提供具有受控缺陷分布的半导体外延晶片，以通过充分保证晶片衬底表面附近的剥离区而减少形成后续外延层的堆叠缺陷或小丘，同时晶片衬底上具有吸杂区 形成了散装区域中充分的吸气效应。 构成：在与晶片基板（10）的表面隔开规定深度的表面区域形成没有晶体缺陷的剥离区域（14a，14b）。 吸杂区域（12）形成在晶片衬底的除去区域之外的体区域中。 外延层（16）形成在晶片衬底上。 晶片基板的去极区的分布是垂直对称的。
-
公开(公告)号：KR1020000065400A
公开(公告)日：2000-11-15
申请号：KR1019990011633
申请日：1999-04-02
Applicant: 삼성전자주식회사
IPC: H01L21/208
Abstract: PURPOSE: A method for manufacturing an ingot of a semiconductor device is provided to manufacture an ingot containing low density oxygen, by determining whether measurement values of an ingot grown at a changed seed rotation speed corresponds to desired measurement values, and by suitably controlling the rotation speed according to the determination result. CONSTITUTION: Characteristic values of an ingot grown at an initial rotation speed of the seed are measured. A temperature gradient of the ingot and a ratio of the seed rotation speed to the temperature gradient are calculated. A seed rotation speed is changed according to the temperature gradient of the ingot and the ratio of the seed rotation speed to the temperature gradient. Characteristic values of the ingot grown at a changed seed rotation speed are measured. Whether Characteristic values of an ingot grown at a changed seed rotation speed and desired values correspond, is determined. When the characteristic values and the desired values correspond, the seed rotation speed is established as the changed speed.
Abstract translation: 目的：提供一种制造半导体器件的锭的方法，通过确定以改变的种子转速生长的锭的测量值是否对应于期望的测量值，并且通过适当地控制旋转来制造含有低密度氧的锭 速度根据测定结果。 组成：测量在种子的初始转速下生长的锭的特征值。 计算锭的温度梯度和种子旋转速度与温度梯度的比率。 种子转速根据锭的温度梯度和种子转速与温度梯度的比例而改变。 测量以改变的种子转速生长的锭的特征值。 确定以改变的种子转速和所需值对应生长的锭的特征值。 当特征值和期望值对应时，种子转速被确定为改变的速度。
-
公开(公告)号：KR101740338B1
公开(公告)日：2017-05-26
申请号：KR1020100102270
申请日：2010-10-20
Applicant: 삼성전자주식회사
CPC classification number: G06F1/324 , G06F1/3215 , G06F1/3228 , G06F1/3253 , Y02D10/126 , Y02D10/151
Abstract: 본발명은디지털시스템에서 CPU 및 BUS의클럭주파수를동적으로변경하기위한것으로서, 상기디지털시스템은, 상기 CPU의동작정보에따라상기 CPU의클럭주파수의변경여부를결정하고, 상기 BUS의동작정보에따라상기 BUS의클럭주파수의변경여부를결정하는 AFS 제어부와, 상기 AFS 제어부의결정에따라상기 CPU의클럭주파수및 상기 BUS의클럭주파수를생성하는클럭제어부를포함하며, 상기 AFS 제어부는, 상기 BUS의클럭주파수를제1값으로상향변경할것을결정한경우, 상기제1값이상기 CPU의현재클럭주파수보다높으면, 상기 BUS의클럭주파수를상기제1값으로상기 CPU의클럭주파수를상기제1값보다크거나같은값으로변경할것을상기클럭제어부로요청한다.
Abstract translation: 本发明用于动态地改变在数字系统中，数字系统是，根据CPU的操作信息的CPU和总线的时钟频率，并确定是否改变CPU的时钟频率，总线的操作的信息 取决于包括时钟控制单元，用于产生时钟频率，并根据AFS控制单元CPU的BUS的用于确定的改变的时钟频率，如果总线的时钟频率，AFS控制的确定，该AFS控制单元，所述BUS 如果受到向上的变化为第一值所确定的时钟频率，电流的所述第一值大于所述移相器CPU的时钟频率越高，总线的时钟频率比CPU的时钟频率的第一值的第一值大于 或者达到相同的价值。
-
公开(公告)号：KR101466890B1
公开(公告)日：2014-12-11
申请号：KR1020070113528
申请日：2007-11-08
Applicant: 삼성전자주식회사
IPC: H03K17/22
Abstract: 본발명은시스템온 칩에서리셋회로장치및 방법에관한것으로서, 외부의리셋핀을통해리셋신호가입력되는동안에슬립트랜지스터를온 시키기위한제 1 제어신호를생성하고, 상기외부리셋핀을통해리셋신호가입력되지않는동안에상기슬립트랜지스터를오프시키기위한제 2 제어신호를생성하는슬립신호생성부(sleep signal generator)와, 상기슬립신호생성부에서상기슬립트랜지스터를온 시키기위한상기제 1 제어신호가입력되는동안에온 되어리셋버퍼체인부(reset buffer chain)로전원을공급하고, 상기슬립신호생성부에서상기슬립트랜지스터를오프시키기위한상기제 2 제어신호가입력되는동안에오프되어리셋버퍼체인부로의전원을차단하는슬립트랜지스터(sleep transistor)와, 상기슬립트랜지스터에의해전원을공급받는동안에상기외부리셋핀을통해입력되는리셋신호를리셋이필요한소자에전달하는복수의버퍼들로구성된리셋버퍼체인부를포함하여, 리셋신호가입력되지않을경우, 리셋신호의전달경로에연결된수많은버퍼에전원이공급되는것을차단함으로써, 기존의리셋동작을그대로사용하면서상기리셋신호가입력되지않는대부분의시간동안상기수많은버퍼에서발생되는누설전류로인한전력소모를제거할수 있다.
-
-
-
-
-
-
-
-
-
Search Results
26
records
(took 0.016 seconds)
