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公开(公告)号：KR1019940004262B1
公开(公告)日：1994-05-19
申请号：KR1019900021813
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L21/335
Abstract: preparing a GaAs substrate; depositing a Si layer on the substrate; forming a first photoresist pattern on the Si layer; etching the Si layer using the first photoresist pattern as a mask to define ohmic contact regions of source/drain electrodes; forming a second photoresist pattern on the substrate after removal of the first photoresist pattern to define a channel region and injecting a predetermined quantity of Si ions into the substrate; depositing a protective layer around the substrate after removal of the second photoresist pattern; and annealing the substrate to activate Si ions of the remaining Si layer and diffusing the activating Si ions into the deep direction of the substrate.
Abstract translation: 制备GaAs衬底; 在衬底上沉积Si层; 在所述Si层上形成第一光刻胶图案; 使用第一光致抗蚀剂图案作为掩模蚀刻Si层以限定源/漏电极的欧姆接触区域; 在去除第一光致抗蚀剂图案之后在衬底上形成第二光致抗蚀剂图案以限定沟道区域并将预定量的Si离子注入到衬底中; 在除去第二光致抗蚀剂图案之后，在衬底周围沉积保护层; 并且使衬底退火以激活剩余Si层的Si离子并将活化Si离子扩散到衬底的深度方向。
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公开(公告)号：KR1019940002397B1
公开(公告)日：1994-03-24
申请号：KR1019910010539
申请日：1991-06-25
Applicant: 한국전자통신연구원
IPC: H01L29/73
Abstract: The metallic semiconductor transistor production processes comprise: (a) plasma enhanced chemical vapor deposition of silicon nitride (or silicon dioxide as an insulating material for enhancing breakdown and threshold voltages) (6) having a source and a drain (5), forming a photosensitive film (7) having an over-hang structure at a gate part by curing the photosensitive film with monochlorobenzene, dry etching silicon nitirde exposed at a gate (8) part, and wet etching (the 1st self aligned recess) gallium arsenide layer of N positive layer (4); (b) lateral etching by dry etching silicon nitride under the photosensitive film; (c) wet etching (the 2nd or wide recess) the N negative (3) and N positive (4) layers with silicon nitride as a mask; (d) after vacuum depositing metal for the gate, removing the photosensitive film with an organic component remover, acetone etc., and eliminating the metallic layer deposited on the photosensitive film.
Abstract translation: 金属半导体晶体管的制造方法包括：（a）具有源极和漏极（5）的氮化硅（或二氧化硅作为用于增强击穿和阈值电压的绝缘材料）的等离子体增强化学气相沉积，形成光敏 通过用一氯苯固化感光膜，在栅极部分具有过悬挂结构的膜（7），在栅极（8）部分暴露的干蚀刻硅氮化物，以及N（N第一自对准凹槽）砷化镓层 正层（4）; （b）通过在感光膜下干蚀刻氮化硅进行横向蚀刻; （c）用氮化硅作为掩模的N阴性（3）和N（4）层的湿蚀刻（第二或宽凹槽） （d）真空沉积金属为栅极，用有机成分去除剂丙酮等去除感光膜，并消除沉积在感光膜上的金属层。
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Patent Agency Ranking
公开(公告)号：KR1019940003064A
公开(公告)日：1994-02-19
申请号：KR1019920006117
申请日：1992-07-13
Applicant: 한국전자통신연구원
IPC: H01L29/00
Abstract: 본 발명은 갈륨비소(GaAs)화합물 반도체 장치에 관한 것으로서, 특히 초고주파 특성 및 트랜지스터의 동작특성을 향상시키기 위해 게이트-소오스, 게이트-드래인 사이의 공기중에 노출된 전자 채널층인 표면부위에 유황보호막을 형성시킨, 갈륨비소 화합물 반도체 장치에 관한 것이다.
공기중에 노출되는 전자 채널층을 갖는 화합물 반도체 장치에 있어서, 상기 전자채널층 상에 유황막(110)을 형성한 다음, 이 유황막(110) 상에 보호막(104)이 형성된 것을 특징으로 한다.-
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公开(公告)号：KR1019950001166B1
公开(公告)日：1995-02-11
申请号：KR1019920006117
申请日：1992-07-13
Applicant: 한국전자통신연구원
IPC: H01L29/00
Abstract: The method includes the steps of forming an undoped GaAs layer (108), an N GaAs layer (107), and an N+ GaAs layer (106) on the insulating GaAs substrate (109), forming an electron channel layer thereon, and forming a sulfur film (110) on the electron channel layer to form a passivation film (104) on the sulfur film (110). The sulfur layer (110) is formed by surface-treating the electron channel layer with a sulfur system ((NH4)2Sx) solution, thereby reducing the gate leakage current of MESFET.
Abstract translation: 该方法包括以下步骤：在绝缘GaAs衬底（109）上形成未掺杂的GaAs层（108），N GaAs层（107）和N + GaAs层（106），在其上形成电子通道层，并形成 硫膜（110），以在硫膜（110）上形成钝化膜（104）。 通过用硫系（（NH 4）2S x）溶液表面处理电子通道层形成硫层（110），从而降低MESFET的栅极漏电流。
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公开(公告)号：KR1019940007666B1
公开(公告)日：1994-08-22
申请号：KR1019900021812
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L29/772
CPC classification number: H01L29/66878 , H01L21/28587
Abstract: The method manufactures a self-align GaAs field effect transistor by using a heat-resisting gate. The method comprises the steps of: (A) forming a photosensitive pattern (124) and injecting n-type impurity on an active region; (B) removing a pattern (124) and forming a silicon layer (122) and a metal layer (123); (C) forming a photosensitive pattern to define a gate region; (D) removing a metal layer (123) and a silicon layer (122) by a mask to form a gate; (E) forming a source/drain region and injecting n-type impurity; (F) forming a metal silicide by thermal process; and (G) forming an ohmic electrode (126) on a source/drain region.
Abstract translation: 该方法通过使用耐热栅极制造自对准GaAs场效应晶体管。 该方法包括以下步骤：（A）在活性区上形成感光图案（124）并注入n型杂质; （B）去除图案（124）并形成硅层（122）和金属层（123）; （C）形成感光图形以限定栅极区域; （D）通过掩模去除金属层（123）和硅层（122）以形成栅极; （E）形成源极/漏极区域并注入n型杂质; （F）通过热处理形成金属硅化物; 和（G）在源极/漏极区上形成欧姆电极（126）。
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