公开(公告)号：CA2009779C

公开(公告)日：1994-05-03

申请号：CA2009779

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F9/46 ,  G06F11/00 ,  G06F11/16 ,  G06F11/20 ,  G06F12/02 ,  G06F13/368 ,  G06F15/177 ,  G06F9/06 ,  G06F12/00

Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/83 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：CA2009765A1

公开(公告)日：1990-11-17

申请号：CA2009765

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUAREZ GUSTAVO A

IPC: G06F11/18 ,  G06F11/00 ,  G06F11/10 ,  G06F11/16 ,  G06F11/20 ,  G06F15/16 ,  G06F15/173 ,  G06F15/177

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：AU4193585A

公开(公告)日：1985-12-19

申请号：AU4193585

申请日：1985-05-03

Applicant: IBM

Inventor： BAKER ERNEST D ,  FARRELL ROBERT H ,  KATZ NEIL A ,  OVIES HERNANDO

IPC: G06F13/12 ,  G06F3/06 ,  G06F12/08 ,  G06F13/38

Abstract: An I/O controller for disparate serial memories and a cache memory for the controller, comprising a device data flow section with a device bus linking a buffer RAM through registers to the respective memories and to a buffer register and further comprising a cache bus linking the buffer register to a cache memory and through a channel register to the main processor. Data is transferred from the disks to the buffer register through the buffer RAM. The device and cache data flows can proceed independently.

公开(公告)号：CA2009548C

公开(公告)日：1996-07-02

申请号：CA2009548

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUAREZ GUSTAVO A

IPC: G06F9/46 ,  G06F9/50 ,  G06F11/16 ,  G06F12/02 ,  G06F13/18 ,  G06F15/16 ,  G06F15/167 ,  G06F15/177 ,  G06F12/00

Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/37C peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：DE3586299D1

公开(公告)日：1992-08-13

申请号：DE3586299

申请日：1985-04-30

Applicant: IBM

Inventor： BAKER ERNEST D ,  FARRELL ROBERT HENRY ,  KATZ NEIL ALAN ,  OVIES HERNANDO

IPC: G06F13/12 ,  G06F3/06 ,  G06F12/08

Abstract: An I/O controller for disparate serial memories and a cache memory for the controller, comprising a device data flow section with a device bus linking a buffer RAM through registers to the respective memories and to a buffer register and further comprising a cache bus linking the buffer register to a cache memory and through a channel register to the main processor. Data is transferred from the disks to the buffer register through the buffer RAM. The device and cache data flows can proceed independently.

公开(公告)号：BR9002296A

公开(公告)日：1991-08-13

申请号：BR9002296

申请日：1990-05-16

Applicant: IBM

Inventor： DINWIDDI JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES MAURICE ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH R ,  BAKER ERNEST D

IPC: G06F15/16 ,  G06F12/02 ,  G06F13/38 ,  G06F13/14

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：BR9002304A

公开(公告)日：1991-08-06

申请号：BR9002304

申请日：1990-05-17

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  BAKER ERNEST D ,  SUAREZ GUSTAVO A

IPC: G06F9/46 ,  G06F9/50 ,  G06F11/16 ,  G06F12/02 ,  G06F13/18 ,  G06F15/16 ,  G06F15/167 ,  G06F15/177 ,  G06F13/14

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors dirertly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：BR9002280A

公开(公告)日：1991-08-06

申请号：BR9002280

申请日：1990-05-16

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F9/46 ,  G06F11/00 ,  G06F11/16 ,  G06F11/20 ,  G06F12/02 ,  G06F13/368 ,  G06F15/177 ,  G06F13/00

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：BR8502592A

公开(公告)日：1986-02-04

申请号：BR8502592

申请日：1985-05-30

Applicant: IBM

Inventor： OVIES HERNANDO ,  KATZ NEIL IAN ,  FARRELL ROBERT HENRY ,  BAKER ERNEST D

IPC: G06F13/12 ,  G06F3/06 ,  G06F12/08 ,  G06F13/14

Abstract: An I/O controller for disparate serial memories and a cache memory for the controller, comprising a device data flow section with a device bus linking a buffer RAM through registers to the respective memories and to a buffer register and further comprising a cache bus linking the buffer register to a cache memory and through a channel register to the main processor. Data is transferred from the disks to the buffer register through the buffer RAM. The device and cache data flows can proceed independently.