-
公开(公告)号：DE69200544D1
公开(公告)日：1994-12-01
申请号：DE69200544
申请日：1992-01-17
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
IPC: H01R12/00 , H01R12/71 , H01R13/24 , H01R43/00 , H05K1/00 , H05K3/00 , H05K3/32 , H05K3/40 , H05K3/46
Abstract: An integral elastomeric card edge connector provides shorter signal paths through the contact with reduced interference. The card edge contact allows high density interconnection between several layers of multi-layer circuit card without routing signal paths to the card surface. Elastomeric contact tab supports provide positive contact pressure and the necessary wipe action to ensure electrical contact. The process for forming the integral contacts begins with a standard multi-layer card which is then beveled, etched to expose the contact tabs, filled with elastomeric material and processed to expose the tabs supported by elastomeric columns. The connector may be used in card-on-board technologies or for the connection of multi-chip organic substrates to boards or to other substrates.
-
公开(公告)号：GB2492490C
公开(公告)日：2014-04-02
申请号：GB201211845
申请日：2011-03-01
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
IPC: H05K1/11
-
公开(公告)号：GB2492490B
公开(公告)日：2014-03-12
申请号：GB201211845
申请日：2011-03-01
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
IPC: H05K1/11
-
公开(公告)号：DE112010004846T5
公开(公告)日：2012-10-31
申请号：DE112010004846
申请日：2010-11-09
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
Abstract: Eine Vorrichtung, ein System und ein Verfahren zur Bereitstellung von elektrischen Verbindungen für eine flächig angeordnete Einheit werden offenbart. Jedes einer Vielzahl von Löchern in einer Leiterplatte weist einen darin befindlichen Leiter sowie eine Öffnung an einer Seite der Leiterplatte auf. Elektrisch leitende Kontaktpfosten ragen aus den Öffnungen der Löcher heraus. Die Kontaktpfosten sind in einem Muster angeordnet, das Kontaktstellen auf einer flächig angeordneten Einheit entspricht. Ein nachgiebiger Teil eines jeden Kontaktpfostens wird in ein Loch gesetzt. Der Leiter drückt den nachgiebigen Teil zusammen, um den Kontaktpfosten entfernbar in dem Loch zu befestigen. Die Leiter bilden eine elektrische Verbindung mit dem Kontaktpfosten. Ein federnder Teil eines jeden Kontaktpfostens steht von der Leiterplatte ab. Der federnde Teil kann in Richtung zur Leiterplatte zusammengedrückt werden und stellt als Reaktion auf einen Kontakt mit der Kontaktstelle eine elektrische Verbindung zwischen einem Kontaktpfosten und einer Kontaktstelle her.
-
公开(公告)号：DE69734158D1
公开(公告)日：2005-10-13
申请号：DE69734158
申请日：1997-09-12
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL , FOGEL KEITH EDARD , LAURO PAUL AFRED , LIAO YUN-HSIN , MORRIS PETER , SHIH DA-YUAN
-
Patent Agency Ranking
公开(公告)号：DE69115106D1
公开(公告)日：1996-01-18
申请号：DE69115106
申请日：1991-02-07
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL , FOGEL KEITH EDWARD , KIM JUNGIHL , MAYR WOLFGANG , SHAW JANE MARGARET , WALKER GEORGE FREDERICK
Abstract: An electrical connector is described for making contact with a plurality of convex and deformable contacts (40, 46) on an electronic device (38). The electrical connector comprises a substrate having a plurality of conductors (10, 12, 14) which extend above its surface. A polymeric material (20) is disposed on the surface of the substrate and has openings which expose the conductors, each opening sized to receive one of the convex, deformable contacts, and to enable electrical connection between the exposed conductors and the deformable contacts. A mechanism is provided for urging the deformable contacts on the electronic device against the exposed conductors. The mechanism exerts sufficient force between the device and the conductors to cause some deformation of the convex contact areas by the conductors.
-
公开(公告)号：GB2492490A
公开(公告)日：2013-01-02
申请号：GB201211845
申请日：2011-03-01
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
IPC: H05K1/11
Abstract: A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending from the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.
-
公开(公告)号：DE112011100335T5
公开(公告)日：2012-11-22
申请号：DE112011100335
申请日：2011-03-01
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL
IPC: H05K1/11
Abstract: Es werden eine Leiterplattenanordnung und ein Verfahren zum Bestücken für eine Leiterplatte bereitgestellt, die eine obere und eine untere Fläche mit zumindest einem Randabschnitt, der über eine abgerundete Oberfläche verfügt, die sich von der oberen Fläche bis zu einem Punkt unterhalb der oberen Fläche erstreckt, und zumindest eine elektrische Kontaktfläche aufweist, die sich auf der oberen Fläche befindet und sich über die abgerundete Oberfläche des Randabschnitts bis zu einem Punkt unterhalb der oberen Fläche erstreckt.
-
公开(公告)号：DE69417640T2
公开(公告)日：1999-12-02
申请号：DE69417640
申请日：1994-06-28
Applicant: IBM
Inventor： AYALA-ESQUILIN JUAN , BEAMAN BRIAN SAMUEL , HARING RUDOLF ADRIAAN , HEDRICK JAMES LUPTON , SHIH DA-YUAN , WALKER GEORGE FREDERICK
Abstract: The present invention relates to an improved pinless connector for use in microelectronics having an elastomer resin comprising polysiloxane and filler. In particular the elastomer resin has a tensile strength greater than 170 psi and comprises (i) a crosslinked polysiloxane comprising about 70 to 90 weight % of a crosslinked random copolymer of dimethylsiloxane and diphenylsiloxane and (ii) about 10 to 30 weight % of filler comprising zinc oxide and a lanthanide oxide.
-
公开(公告)号：DE69322832T2
公开(公告)日：1999-08-05
申请号：DE69322832
申请日：1993-10-04
Applicant: IBM
Inventor： BEAMAN BRIAN SAMUEL , DOANY FUAD ELIAS , FOGEL KEITH EDWARD , HEDRICK JR JAMES LUPTON , LAURO PAUL ALFRED , NORCOTT MAURICE HEATHCOTE , RITSKO JOHN JAMES , SHI LEATHEN , SHIH DA-YUAN , WALKER GEORGE FREDERICK
IPC: G01R1/067 , G01R1/073 , H01L23/52 , G01R3/00 , G01R31/28 , H01L23/498 , H01L23/538 , H01L25/065 , H01L25/07 , H01L25/18
Abstract: The present invention is directed to a structure (2) for packaging electronic devices, such as semiconductor chips (36, 38), in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies (4, 6). Each assembly is formed from a substrate (8) having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection means (49) electrically interconnecting each assembly. The electrical interconnection means is formed from an elastomeric interposer. The elastomeric interposer is formed from an elastomeric material having a plurality of electrical conductors extending therethrough, either in a clustered or un-clustered arrangement. The electrical interconnection means is fabricated having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection means is disposed over the array of electronic devices so that the electrical interconnection means is between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection means between adjacent assemblies. The substrate of each assembly is formed from a thermally conductive material such as diamond. A heat dissipation means is thermally connected to the edges of the substrate to extract heat generated within the structure. Methods for fabricating the electrical interconnection means as a stand alone elastomeric sheet are described. The ends (50, 54) of the plurality of conductors in the electrical interconnection means (49) are fabricated so that upon compression between adjacent assemblies (4, 6) there is a wiping action between the conductor ends (e.g. 50) and contact locations (e.g. 30) on the adjacent assemblies to form a good electrical contact therewith.
-
-
-
-
-
-
-
-
-
Search Results
22
records
(took 0.02 seconds)
