-
公开(公告)号：CA1075366A
公开(公告)日：1980-04-08
申请号：CA275542
申请日：1977-04-05
Applicant: IBM
Inventor： BIRNEY RICHARD E , OSBORNE WILLIAM S , GRAYBIEL LYNN A
Abstract: A control circuit arrangement for storing the addressability currently being accessed by a processor by inputting and storing each processor active address key (AAK) in a last AAK register. When a hard or soft check interrupt occurs, the interrupted addressability is saved as the processor's last key saved (i.e LKSA) in the processor last AAK register. A hard or soft check interrupt includes a machine check interrupt, a program check interrupt, or a software exception. The interrupted addressability in then connected to the supervisor addressability by gating the LKSA into the source operand key section in the AKR from the processor's last AAK register, and setting the supervisor key into the other sections of the AKR, in preparation for performing certain supervisor operations. Until the LKSA gating into the AKR is completed, no AAK is ingated into the last AAK register. Thereafter the ingating by the last AAK register is resumed when the processor generates either a machine check reset, program check reset, or system reset.
-
Patent Agency Ranking
公开(公告)号：FR2389172A1
公开(公告)日：1978-11-24
申请号：FR7809181
申请日：1978-03-23
Applicant: IBM
Inventor： BIRNEY RICHARD E , LEININGER JOEL C , TAYLOR GEORGE P
-
公开(公告)号：CA1087754A
公开(公告)日：1980-10-14
申请号：CA275598
申请日：1977-04-05
Applicant: IBM
Inventor： BIRNEY RICHARD E , HOOD ROBERT A
Abstract: EQUATE OPERAND ADDRESS SPACE CONTROL SYSTEM Equate operand spaces (EOS) control over the addressabilities provided by different address keys in an address key register (AKR) in a processor. When enabled, the EOS control forces each source operand access to occur within the sink operand addressability specified in the AKR, even though the AKR explicitly specifies a different addressability for source operands. When the EOS feature is disabled, the source operand addressability contained in the AKR is used when fetching source operands. An EOS field in the AKR stores whether the EOS state is enabled in the processor. The EOS field is connected to active address key (AAK) select circuits. When the EOS state is enabled, it outgates from the AKR the sink operand address key as the AAK in response to a source operand request. The source operand address key in the AKR is not disturbed by EOS enablement or disablement. Upon disabling the EOS state, the AAK select circuits resume any separate addressabilities available in the AKR for the source and sink operands.
-
公开(公告)号：CA1081859A
公开(公告)日：1980-07-15
申请号：CA275573
申请日：1977-04-05
Applicant: IBM
Inventor： BIRNEY RICHARD E , DAVIS MICHAEL I , HOOD ROBERT A , GRAYBIEL LYNN A , KAHN SAMUEL , OSBORNE WILLIAM S
Abstract: KEY CONTROLLED ADDRESS RELOCATION TRANSLATION SYSTEM Translates each active address key (AAK) into a respective addressability in physical main memory. Each addressability comprises one or more physical blocks which may be scattered in the main memory. Address keys are contained in plural key register sections, and AAK select circuits outgate to the translator each M K from a key register section corresponding to the access type for each storage access request currently received from a processor or I/O channel. Each address key identifies a particular stack of one or more segmentation registers. Each segmentation register can be assigned the address of any segment (i.e. a block of contiguous physical addresses located anywhere in the main memory). Each segmentation register also has validity and read-only flag bits for its assigned block. Each stack can translate a contiguous set of logical program addresses into physical addresses. Any stack can support all logical addresses apparent to a program, although the machine can cause a single program to access plural addressabilities due to the machine assignment of address keys. For each storage access request for a logical program address, a stack is addressed by the AAK to determine an addressability. Then a register in the stack is addressed by high-order bits in the logical program address. The addressed register outputs the translated block address. The main memory can have any physical size in relation to the number of stacks, and to the number of segmentation registers in each stack.
-
公开(公告)号：CA1075367A
公开(公告)日：1980-04-08
申请号：CA275544
申请日：1977-04-05
Applicant: IBM
Inventor： BIRNEY RICHARD E , DAVIS MICHAEL I
Abstract: Combines a storage protect key stack with an access key register (AKR) and active access key (AAK) select circuits. Storage key entries in the stack correspond to the physical blocks in main memory. This combination can provide storage protection for different storage access types within address sub-ranges in the main memory associated with respective access keys. The sub-ranges are blocks of addresses within the full range of addresses of the physical memory. The protect key operation applies to physical addresses, and it obtains system addressing compatibility with an address translation operation using the same access keys as address keys with program logical addresses. Special features include a shared protect key, which need not be loaded in the AKR, to make specified sub-range(s) shareable by all users of the system, so that any user can access the blocks in memory associated with the shared protect key. For I/O accesses, an override is provided which ignores any read-only control of any memory block to which an I/O access is requested. Supervisor accesses can be made in all key areas, regardless of the AAK, the protect keys, or the read-only flag bits.
-
公开(公告)号：FR2349918A1
公开(公告)日：1977-11-25
申请号：FR7706016
申请日：1977-02-24
Applicant: IBM
Inventor： BIRNEY RICHARD E , DAVIS MICHAEL I , HOOD ROBERT A
-
-
-
-
-
Search Results
16
records
(took 0.019 seconds)
