公开(公告)号：SG155816A1

公开(公告)日：2009-10-29

申请号：SG2008025611

申请日：2008-04-02

Applicant: CHARTERED SEMICONDUCTOR MFG ,  IBM ,  INFINEON TECHNOLOGIES AG ,  SAMSUNG

Inventor： GON LEE JAE ,  CHAN VICTOR ,  HO YANG JONG ,  JUNG KIM JUN

Abstract: An integrated circuit system that includes: providing a substrate including a first region with a first device and a second device and a second region with a resistance device; configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer; forming a stress inducing layer over the first region and the second region; processing at least a portion of the stress inducing layer formed over the first region to alter the stress within the stress inducing layer; and forming a third spacer adjacent the second spacer of the first device and the second device from the stress inducing layer.

公开(公告)号：SG153816A1

公开(公告)日：2009-07-29

申请号：SG2009039397

申请日：2006-10-17

Applicant: CHARTERED SEMICONDUCTOR MFG ,  IBM

Inventor： YONG LIM KHEE ,  HUA LIM ENG ,  WENHE LIM ,  CHAN VICTOR ,  FEN JAMIN F

Abstract: A method for forming a device with both PFET and NFET transistors using a PFET compressive etch stop liner and a NFET tensile etch stop liner and two anneals in a deuterium containing atmosphere. The method comprises: providing a NFET transistor in a NFET region and a PFET transistor in a PFET region. We form a NFET tensile contact etch-stop liner over the NFET region. Then we perform a first deuterium anneal. We form a PFET compressive etch stop liner over the PFET region. We form a (ILD) dielectric layer with contact openings over the substrate. We perform a second deuterium anneal. The temperature of the second deuterium anneal is less than the temperature of the first deuterium anneal.

公开(公告)号：SG139632A1

公开(公告)日：2008-02-29

申请号：SG2007043730

申请日：2007-06-14

Applicant: CHARTERED SEMICONDUCTOR MFG ,  IBM

Inventor： MENG LEE YONG ,  YANG HAINING S ,  CHAN VICTOR ,  HUA LIM ENG

Abstract: STRUCTURE AND METHOD TO IMPLEMENT DUAL STRESSOR LAYERS WITH IMPROVED SILICIDE CONTROL An example embodiment for a method of fabrication of a semiconductor device comprises the following. We provide a substrate with a first device region and a second device region. We provide a first type FET transistor in the first device region and provide a second type FET transistor in the second device region. We form an etch stop layer over the first and second device regions and forming a first stressor layer over the first device region. The first stressor layer puts a first type stress on the substrate in the first device region. We form a second stressor layer over the second device region. The second stressor layer puts a second type stress on the substrate in the second device region. Another example embodiment is the structure of a dual stress layer device having an etch stop layer.

公开(公告)号：CA2327167C

公开(公告)日：2007-10-16

申请号：CA2327167

申请日：2000-11-30

Applicant: IBM CANADA

Inventor： CHIN HOWARD CHUN ,  CHAN VICTOR ,  HUBBARD MARK W ,  WANG FEN

Abstract: A system and method of composing a query object for application against a database is provided. The method composes a selection clause for the query. Next, a criteria clause for the query is generated, with the criteria clause comprising input criteria relat ed to the query and additional criteria specified against the query and generated criteria based on a joint relationship. Next a source clause utilizing elements in the database accessed by the quer y is generated. A database traversal system and method is provided. The method identifies all tables directly accessible by each table and creating a data structure comprising an entry for each table. The entry comprises an identification field for each table and a link field identifying the all tables directly accessible by each table. The data structure is traversed and an optimum path of the traversal paths utilizing data obtained from traversing the data structure is identified.

公开(公告)号：AU2308502A

公开(公告)日：2002-06-11

申请号：AU2308502

申请日：2001-11-23

Applicant: IBM

Inventor： CHAN VICTOR

IPC: G06Q30/08 ,  G06F17/30 ,  G06F17/60

Abstract: Pages are provided in response to a request from a browser received by a server. The server obtains an adapted page, based on a template page, from a display infrastructure. The display infrastructure uses a template page identifier obtained from a resolution component. The resolution component obtains template page identifiers by matching attributes relating to the page request with attributes associated with template page identifiers stored in a database. The template page identifiers are provided based on the best match of the template page attributes and the page request attributes, with default values being used and a defined ranking being used where multiple matched template pages exist.

公开(公告)号：CA2327161A1

公开(公告)日：2002-05-30

申请号：CA2327161

申请日：2000-11-30

Applicant: IBM CANADA

Inventor： CHAN VICTOR ,  LAKHANI AALIM

IPC: G06Q30/08 ,  H04L29/02 ,  G06F3/14 ,  H04L12/24 ,  G06F17/30

Abstract: Pages are provided in response to a request from a browser received by a server. The server obtains an adapted page, based on a template page, from a display infrastructure. Th e display infrastructure uses a template page identifier obtained from a resolution component. The resolution component obtains template page identifiers by matching attributes relating to the pag e request with attributes associated with template page identifiers stored in a database. The template page identifiers are provided based on the best match of the template page attributes and the pag e request attributes, with default values being used and a defined ranking being used where multiple matched template pages exist.

公开(公告)号：CA2327076A1

公开(公告)日：2002-05-30

申请号：CA2327076

申请日：2000-11-30

Applicant: IBM CANADA

Inventor： CHAN VICTOR ,  LAKHANI AALIM

IPC: G06Q30/06 ,  H04L12/16 ,  G06F17/60 ,  G06F17/30

Abstract: An e-commerce system having a catalog database including package data correlated to at least one package; a selection module; and a resolution module. The catalog database preferably also includes item data correlated to a plurality of items, each of which is full y resolved; product data correlated to at least one product, wherein each product comprises at least one unresolved attribute; and attribute data. An e-commerce method comprising the steps of creating a catalog database containing package data correlated to at least one package, each package having at least one unresolved package attribute; determining a selected package from the catalo g database; and resolving the unresolved attributes.

公开(公告)号：SG163492A1

公开(公告)日：2010-08-30

申请号：SG2010002541

申请日：2010-01-14

Applicant: CHARTERED SEMICONDUCTOR MFG ,  SAMSUNG ELECTRONICS CO LTD ,  IBM ,  INFINEON TECHNOLOGIES CORP ,  FREESCALE SEMICONDUCTOR INC

Inventor： CHOONGRYUL RYOU ,  SEUNGHWAN LEE ,  JUN YUAN ,  CHAN VICTOR ,  ELLER MANFRED ,  SUNG KIM NAM ,  KANIKE NARASIMHULU ,  SAMAVEDAM SRIKANTH BALAJI

Abstract: A method for generating an embedded resistor in a semiconductor device are provided, the method including forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo- resist mask on a portion of the silicon layer; etching the silicon layer to yield a poly-conductor (PC); oxidizing the PC; depositing at least one of an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the at least one oxide material or metal gate material; patterning a transistor gate structure disposed substantially away from the STI region. Fig. 15

公开(公告)号：AT450892T

公开(公告)日：2009-12-15

申请号：AT04822326

申请日：2004-12-15

Applicant: IBM

Inventor： CHAN VICTOR ,  FISCHETTI MASSIMO ,  HERGENROTHER JOHN ,  LEONG MEIKEI ,  RENGARAJAN RAJESH ,  REZNICEK ALEXANDER ,  SOLOMON PAUL ,  SUNG CHUN-YUNG ,  YANG MIN

IPC: H01L29/02 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/04 ,  H01L29/786 ,  H01L31/109

Abstract: The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

公开(公告)号：CA2379082A1

公开(公告)日：2003-09-27

申请号：CA2379082

申请日：2002-03-27

Applicant: IBM CANADA

Inventor： LINEHAN MARK H ,  CHAN VICTOR ,  KHUSIAL DRASHANAND ,  MIRLAS LEV ,  BOURNE DONALD A

IPC: G06F17/30 ,  H04L29/06 ,  H04L29/08 ,  H04L12/22 ,  H04L12/16 ,  H04L9/32

Abstract: A secure method and system for accessing a cache for web session is provided using web browser cookies. The cache for the web session data uses an encoded identifier, determined using for example the Keyed-Hash Message Authentication Code, based on information identifying a client. The client communication is accompanied by a cookie (persistent stat e object) that also includes the identifier encoded in the same manner. This encoded identifier in the received cookie is used for accessing the cached data. Where a secure communication channel is available, such as a secure socket layer (SSL connection), a second cookie which is only transmitted over SSL is used as a signature for the first cookie.