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公开(公告)号:JP2001216092A
公开(公告)日:2001-08-10
申请号:JP2000019379
申请日:2000-01-27
Applicant: IBM
Inventor: UCHIIKE HIROSHI , KURODA TAKASHI , KANAMARU ATSUSHI , NISHINOMIYA HIROMI , SAITO TAKAHIRO
Abstract: PROBLEM TO BE SOLVED: To improve the reading efficiency to a write command that is kept waiting for its execution and also to improve performance of a hard disk drive. SOLUTION: When a data read request is received while a data write request is kept waiting for its execution, the logical block address of a write command W1 is compared with that of a read command R for deciding presence or absence of their duplication in a positional relation deciding step and a data reading step, where the read command R is executed before all write commands W are executed when no duplication of block addresses is decided.
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公开(公告)号:JP2001117817A
公开(公告)日:2001-04-27
申请号:JP29390999
申请日:1999-10-15
Applicant: IBM
Inventor: KANAMARU ATSUSHI , ASANO HIDEO , KIHASHI AKIRA , SAITO TAKAHIRO , KOBAYASHI KEIJI
Abstract: PROBLEM TO BE SOLVED: To efficiently hold data in respective cache memories by holding data which are common to a high-order and a low-order cache memory or decreasing the number of pieces of data held in the high-order and low-order cache memories in common. SOLUTION: A computer system is equipped with an HDC card 21 which is connected to an extension bus 20 and an HDD drive 22 which is connected to an HDC card 21. The HDC card 21 is equipped with a disk cache (high-order cache memory) and the HDD drive 22 is equipped with a disk cache 54 (low- order cache memory). The HDC card 21 and HDD drive 22 send and receive selection information for selecting swap modes of the cache memories when the system is started and selects mutually different swap modes according to the sent and received selection information.
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公开(公告)号:JPH1145157A
公开(公告)日:1999-02-16
申请号:JP19872897
申请日:1997-07-24
Applicant: IBM
Inventor: SATO MASAHIKO , KAKIHARA TOSHIO , KANAMARU ATSUSHI , OSHIKAWA HIROSHI , ASANO HIDEO
Abstract: PROBLEM TO BE SOLVED: To permit high-reliability data transfer and a minimum throughput decrease by controlling data transfer to a 2nd data transfer speed slower than a 1st data transfer speed once an error detecting means detects a specific error. SOLUTION: A hard disk drive(HDD) is equipped with a hard disk controller 105A which controls operation for reading and writing data out of and to a magnetic disk 101 and an MPU 106 which controls the operation of the whole HDD. To transfer data from the HDD 100 to a host 200, the 1st data transfer speed is set first and the data are transferred from the HDD to the host 200 at the 1st data transfer speed. If a specific error is detected in the transferred data, the data transfer speed is changed to the 2nd transfer speed slower than the 1st transfer speed. Consequently, the state of the IDEI/FBus can be known by monitoring the status of the existent CRC error, so high-reliability data transfer for reading can be performed only by alterations of the drive side.
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公开(公告)号:JP2001005724A
公开(公告)日:2001-01-12
申请号:JP16569699
申请日:1999-06-11
Applicant: IBM
Inventor: KANAMARU ATSUSHI , ASANO HIDEO , UEDA TETSUO
Abstract: PROBLEM TO BE SOLVED: To prevent the data transfer rate of write cache transfer from becoming much worse and to hold its minimum value at high level. SOLUTION: The initial value Ti of virtual buffer-full capacity T(tx) is set to F/N (F is buffer capacity and N>1) and it is decided whether or not a write cache data amount S(tx) reaches the virtual buffer-full capacity T(tx); while S(tx)
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公开(公告)号:JPH10275111A
公开(公告)日:1998-10-13
申请号:JP7513997
申请日:1997-03-27
Applicant: IBM
Inventor: KANAMARU ATSUSHI , KAKIHARA TOSHIO , ASANO HIDEO , TOBARI ATSUSHI
Abstract: PROBLEM TO BE SOLVED: To provide the disk drive device and its control method which can reduce writing to media while minimizing a command overhead, and then improve the total performance. SOLUTION: The disk drive device 10 has HDC13, a cache memory 14, and a command queue holding commands cached in the cache memory 14 and is equipped with HIC 15 which processes host interface peripheries through hardware and a local MPU 16 which includes control over the HDC 13 and HDC 15 and controls the whole HDD; and the device indicates the writing of data to media to the HIC 15 with a write command cached in the cache memory 14, retrieves a retrieval source command which is completely overwritten with the latest issued command among write commands cached in the cache memory 14, and does not write data to the media with the overwritten retrieval source command.
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