公开(公告)号：DE3374092D1

公开(公告)日：1987-11-19

申请号：DE3374092

申请日：1983-10-11

Applicant: IBM

Inventor： THOMA NANDOR GYORGY ,  MOORE VICTOR STEWART ,  KRAFT WAYNE RICHARD

IPC: G06F9/22 ,  G06F9/26

公开(公告)号：DE3371576D1

公开(公告)日：1987-06-19

申请号：DE3371576

申请日：1983-02-01

Applicant: IBM

Inventor： THOMA NANDOR G ,  MOORE VICTOR STEWART ,  KRAFT WAYNE RICHARD

IPC: G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  H03K19/177

Abstract: The decoding device comprises a plurality of programmable logic arrays (20-24) operating in parallel, each to decode an operation code (OP code) of a given instruction class. A portion of the OP code is decoded by a decode multiplexer (40) to select one of the PLA's, and the decoded OP code from the selected PLA is gated through a N-way multiplexer (42) to provide the control code corresponding to the OP code.

公开(公告)号：AU534788B2

公开(公告)日：1984-02-16

申请号：AU6321280

申请日：1980-10-13

Applicant: IBM

Inventor： MOORE VICTOR STUART ,  KRAFT WAYNE RICHARD ,  RHODES JOSEPH CULLEN ,  STAHL WILLIAM LEONARD

IPC: G06F7/00 ,  G06F9/22 ,  G06F15/78 ,  G06F13/00