公开(公告)号：BRPI0413589A

公开(公告)日：2006-10-17

申请号：BRPI0413589

申请日：2004-08-04

Applicant: IBM

Inventor： ELKO DAVID ARLEN ,  LEPORE DANIEL ,  MEHTA CHETAN ,  PFISTER GREGORY FRANCIS ,  SUGRUE PATRICK JOHN

IPC: H04L12/24

Abstract: A method, system, and product in a data processing system are disclosed for providing centralized management of an INFINIBAND distributed system-area network that includes multiple end nodes. A manager application is established in one of the end nodes. An agent application is established in one or more end nodes. Each agent application is independent from the manager application. The manager application maintains a current list of active agent applications and uses the list to manage the agent applications in the end nodes.

公开(公告)号：AT331252T

公开(公告)日：2006-07-15

申请号：AT02718297

申请日：2002-03-18

Applicant: IBM

Inventor： CRADDOCK DAVID ,  ELKO DAVID ARLEN ,  GREGG THOMAS ANTHONY ,  PFISTER GREGORY FRANCIS ,  RECIO RENATO JOHN

IPC: H04L12/28 ,  G06F9/445 ,  G06F13/40

Abstract: A method and system for a distributed computing system having components like end nodes, switches, routers and links interconnecting packets over the interconnecting links. The switches and routers interconnect the end nodes and route the packets to the appropriate end node. The end nodes reassemble the packets into a message at a destination. A mechanism is provided to allow a single physical component to appear as multiple components each with unique control levels. These components may be host channel adapters (HCAs), target channel adapters (TCAs) or switches. A method and system for end node partitioning for a physical element is provided. A configuration of the physical element is selected. A port associated with the physical element is probed, wherein the port is probed with a subnet management packet by a subnet manager. In response to detecting a switch associated with the port, a local identifier is assigned to the port resulting in a configuration change of the physical element.

公开(公告)号：DE3854035T2

公开(公告)日：1996-02-29

申请号：DE3854035

申请日：1988-09-15

Applicant: IBM

Inventor： MCAULIFFE KEVIN PATRIK ,  MELTON EVELYN AU ,  NORTON VERN ALAN ,  PFISTER GREGORY FRANCIS ,  WAKEFIELD SCOTT PHILIP

IPC: G06F12/02 ,  G06F12/06 ,  G06F12/08 ,  G06F12/10 ,  G06F15/17

Abstract: An aperiodic mapping procedure for the mapping of logical to physical addresses is defined as a permutation function for generating optimized stride accesses in an interleaved multiple device system such as a large, parallel processing shared memory system wherein the function comprises a bit-matrix multiplication of a presented first (logical) address with a predetermined matrix to produce a second (physical) address. The permutation function maps the address from a first to a second address space for improved memory performance in such an interleaved memory system. Assuming that the memory has n logical address bits and 2 separately accessible memory devices (where d

公开(公告)号：DE3586389D1

公开(公告)日：1992-08-27

申请号：DE3586389

申请日：1985-10-17

Applicant: IBM

Inventor： BRANTLEY JR ,  MCAULIFEE KEVIN PATRICK ,  NORTON VERN ALAN ,  PFISTER GREGORY FRANCIS ,  WEISS JOSEPH

IPC: G06F12/02 ,  G06F12/06 ,  G06F12/08 ,  G06F15/17

Abstract: Method and Apparatus for dynamically partitioning a storage system into a global storage efficiently accessible by a number of processors connected to a network, and local storage efficiently accessible by individual processors, including means for interleaving storage references by a processor; means under the control of each processor for controlling the means for interleaving storage references and means for dynamically directing storage references to first or second portions of storage.In operation, a virtual address from a processor is stored in VAR 242 and comprises a segment and/or page index (S/P 1) 244, a page offset (PO) 246 and word offset (WO) 248. The S/P I is used in a conventional way as an index into the storage mapping tables 270 to provide a real address which is placed in register 250. Unique to this disclosure, the table look-up also provides a quantity, the interleave amount, which indicates whether the real address is in local or global storage and, which in the latter event, is used to derive the absolute addresses. The low order bits of the real address may be hashed using Remap 252 to introduce a random element into a sequence of consecutive addresses. The real address after mapping, excluding the word offset (WO) is passed to right rotate device 256 which is controlled by the interleave amount. The width of the field to be rotated and the amount the field is to be rotated are specified by the interleave amount. The derived absolute addresses are entered in register 258 and are passed for use onto a communication network interconnecting the processors and the storage system.

公开(公告)号：PH25478A

公开(公告)日：1991-07-01

申请号：PH32816

申请日：1985-08-20

Applicant: IBM

Inventor： BRANTLEY WILLIAM CAIN ,  NORTON VERN ALAN ,  PFISTER GREGORY FRANCIS ,  WEISS KEVIN PATRICK JOSEPH NMN

IPC: G06F12/02 ,  G06F12/06 ,  G06F12/08 ,  G06F15/17 ,  G06F15/16

Abstract: Method and Apparatus for dynamically partitioning a storage system into a global storage efficiently accessible by a number of processors connected to a network, and local storage efficiently accessible by individual processors, including means for interleaving storage references by a processor; means under the control of each processor for controlling the means for interleaving storage references and means for dynamically directing storage references to first or second portions of storage.In operation, a virtual address from a processor is stored in VAR 242 and comprises a segment and/or page index (S/P 1) 244, a page offset (PO) 246 and word offset (WO) 248. The S/P I is used in a conventional way as an index into the storage mapping tables 270 to provide a real address which is placed in register 250. Unique to this disclosure, the table look-up also provides a quantity, the interleave amount, which indicates whether the real address is in local or global storage and, which in the latter event, is used to derive the absolute addresses. The low order bits of the real address may be hashed using Remap 252 to introduce a random element into a sequence of consecutive addresses. The real address after mapping, excluding the word offset (WO) is passed to right rotate device 256 which is controlled by the interleave amount. The width of the field to be rotated and the amount the field is to be rotated are specified by the interleave amount. The derived absolute addresses are entered in register 258 and are passed for use onto a communication network interconnecting the processors and the storage system.