公开(公告)号：DE2628382A1

公开(公告)日：1977-01-27

申请号：DE2628382

申请日：1976-06-24

Applicant: IBM

Inventor： POPONIAK MICHAEL ROBERT ,  SCHWENKER ROBERT OTTO

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/762

Abstract: In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in a semiconductor substrate comprising forming over the semiconductor substrate surface an electrically insulating layer of dielectric material having a plurality of openings therethrough and etching to form recesses in the semiconductor substrate exposed in the openings. Then, aluminum is deposited over the substrate so that an aluminum layer is formed on said layer of dielectric material as well as in said recesses. Next, the aluminum in the recesses is selectively anodized to form aluminum oxide, and the remaining aluminum on said layer of dielectric material is removed either by selectively etching away the aluminum layer or by a "lift-off" technique wherein the insulating layer of dielectric material under the aluminum is etched away thereby "lifting-off" and removing the aluminum.

公开(公告)号：DE2611158A1

公开(公告)日：1976-10-28

申请号：DE2611158

申请日：1976-03-17

Applicant: IBM

Inventor： ABBAS SHAKIR AHMED ,  DOCKERTY ROBERT CHARLES ,  POPONIAK MICHAEL ROBERT

IPC: H01L21/306 ,  H01L21/3063 ,  H01L21/308 ,  B28D5/06

Abstract: 1515031 Electrolytic etching of silicon INTERNATIONAL BUSINESS MACHINES CORP 3 Feb 1976 [14 April 1975] 4111/76 Heading C7B [Also in Division H1] A hole is made in a monocrystalline silicon body by providing masking with aligned apertures on parallel opposed faces of the body, providing a conductor in contact with the body through one of the openings and using this as anode in an anodic treatment to convert the entire region between the apertures to porous silicon which is then etched out to leave a hole. Typically a plurality of holes are simultaneously formed in a 100 oriented wafer which may have integrated circuitry formed on one or both faces. The masking may consist of silicon dioxide or nitride with an optical overlayer of chromium, or of silicon oxynitride or nitride-onoxide. After photoetching to form the apertures heavily doped surface regions may be formed below the apertures on one or both faces by impurity diffusion or implantation of helium ions or protons and a chromium anode layer deposited on one face. After anodic treatment in a 1:2 mixture of 49% hydrofluoric acid and distilled water the anode is removed and the porous silicon etched out.

公开(公告)号：DE2611559A1

公开(公告)日：1976-10-07

申请号：DE2611559

申请日：1976-03-18

Applicant: IBM

Inventor： KU SAN-MEI ,  PILLUS CHARLES ANTHONY ,  POPONIAK MICHAEL ROBERT ,  SCHWENKER ROBERT OTTO

IPC: C30B31/22 ,  H01L21/22 ,  H01L21/265 ,  H01L21/761 ,  B01J17/36 ,  B01J17/34

Abstract: In integrated circuit fabrication, a method is provided for simultaneously forming two regions of the same conductivity-type such as the base and isolation regions. In one embodiment, an epitaxial layer of one conductivity-type is formed on a substrate of opposite conductivity-type, after which dopant ions of the opposite conductivity-type are introduced into the epitaxial surface areas which are to provide the base and isolation regions, and in addition, the isolation regions are bombarded with non-dopant ions having a maximum atomic number of two, e.g., hydrogen or helium ion while the base regions are appropriately masked and remain umbombarded, said bombardment is carried out at temperatures below 300 DEG C, preferably room temperature. The bombardment is preferably carried out so that the non-dopant ions are implanted primarily in regions below the isolation regions. Next, the wafer is heated at a temperature at a range of from 600 DEG - 900 DEG C which is substantially below normal drive-in diffusion temperatures for unbombarded doped regions. The heating to be maintained for a period sufficient to drive-in diffuse the bombarded isolation regions through the epitaxial layer into contact with the substrate but is insufficient to drive-in the unbombarded base regions to such a depth.

公开(公告)号：DE2315795A1

公开(公告)日：1973-11-08

申请号：DE2315795

申请日：1973-03-29

Applicant: IBM

Inventor： PHILBRICK JOHN WHITNEY ,  PILLUS CHARLES ANTHONY ,  POPONIAK MICHAEL ROBERT ,  SCHNEIDER CHRISTIAN PAUL

IPC: G01R27/00 ,  G01N27/02 ,  G01R27/02 ,  H01L21/66 ,  G01R31/26

Abstract: The apparatus and technique discloses a method for measuring the resistivity of semiconductor material over several decades by varying the inductance of a RF energized coil and where the method is significantly independent of operating frequency, type of semiconductor material and the nature of the sample surface and surface and surface condition or preparation.