公开(公告)号：GB2567363A

公开(公告)日：2019-04-10

申请号：GB201901614

申请日：2017-07-21

Applicant: IBM

Inventor： SON VAN NGUYEN ,  TENKO YAMASHITA ,  KANGGUO CHENG ,  THOMAS JASPER HAIGH JR ,  CHANRO PARK ,  ERIC LINIGER ,  JUNTAO LI ,  SANJAY MEHTA

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/49

Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.

公开(公告)号：GB2549685A

公开(公告)日：2017-10-25

申请号：GB201713201

申请日：2016-02-17

Applicant: IBM

Inventor： ZUOGUANG LIU ,  CHIA-YU CHEN ,  TENKO YAMASHITA ,  MIAOMIAO WANG

IPC: H01L21/8238 ,  H01L27/092

Abstract: A technique for forming a semiconductor device is provided. Sacrificial mandrels are formed over a hardmask layer on a semiconductor layer. Spacers are formed on sidewalls of the sacrificial mandrels. The sacrificial mandrels are removed to leave the spacers. A masking process leaves exposed a first set of spacers with a second set protected. In response to the masking process, a first fin etch process forms a first set of fins in the semiconductor layer via first set of spacers. The first set of fins has a vertical sidewall profile. Another masking process leaves exposed the second set of spacers with the first set of spacers and the first set of fins protected. In response to the other masking process, a second fin etch process forms a second set of fins in semiconductor layer using the second set of spacers. The second set of fins has a trapezoidal sidewall profile.

公开(公告)号：GB2537069B

公开(公告)日：2017-02-22

申请号：GB201612148

申请日：2014-10-10

Applicant: IBM

Inventor： VEERARAGHAVAN S BASKER ,  ZUOGUANG LIU ,  TENKO YAMASHITA ,  CHUN-CHEN YEH

IPC: H01L29/66 ,  H01L29/78

公开(公告)号：GB2537069A

公开(公告)日：2016-10-05

申请号：GB201612148

申请日：2014-10-10

Applicant: IBM

Inventor： VEERARAGHAVAN S BASKER ,  ZUOGUANG LIU ,  TENKO YAMASHITA ,  CHUN-CHEN YEH

IPC: H01L29/66 ,  H01L29/78

Abstract: Embodiments are directed to forming a structure comprising at least one fin, a gate, and a spacer, applying an annealing process to the structure to create a gap between the at least one fin and the spacer, and growing an epitaxial semiconductor layer in the gap between the spacer and the at least one fin.