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    STRUCTURE AND METHOD TO MAKE REPLACEMENT METAL GATE AND CONTACT METAL
    12.
    发明申请
    STRUCTURE AND METHOD TO MAKE REPLACEMENT METAL GATE AND CONTACT METAL 审中-公开
    结构和方法替代金属门和接触金属

    公开(公告)号：WO2011109203A2

    公开(公告)日：2011-09-09

    申请号：PCT/US2011025976

    申请日：2011-02-24

    Applicant: IBM ,  SIMON ANDREW H ,  KWON UNOH ,  LI ZHENGWEN ,  WONG KEITH KWONG HON ,  PAPADATOS FILIPPOS ,  CHUDZIK MICHAEL P

    Inventor： SIMON ANDREW H ,  KWON UNOH ,  LI ZHENGWEN ,  WONG KEITH KWONG HON ,  PAPADATOS FILIPPOS ,  CHUDZIK MICHAEL P

    CPC classification number: H01L23/485 ,  H01L21/28088 ,  H01L21/28202 ,  H01L21/76283 ,  H01L21/76877 ,  H01L21/823842 ,  H01L21/823871 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An electrical device is provided with a p-type semiconductor device (105) having a first gate structure (60) that includes a gate dielectric (10) on top of a semiconductor substrate (5), a p-type work function metal layer (25), a metal layer (28) composed of titanium and aluminum, and a metal fill (29 ) composed of aluminum. An n-type semiconductor device (100) is also present, on the semiconductor substrate that includes a second gate structure that includes a gate dielectric, a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. An interlevel dielectric (30) is present over the semiconductor substrate. The interlevel dielectric includes interconnects (80) to the source and drain regions of the p-type and n-type semiconductor devices. The interconnects are composed of a metal layer composed of titanium and aluminium, and a metal fill composed of aluminum. The present disclosure also provides a method of forming the aforementioned structure.

    Abstract translation: 电气装置设置有具有第一栅极结构（60）的p型半导体器件（105），第一栅极结构（60）包括在半导体衬底（5）的顶部上的栅极电介质（10），p型功函数金属层 25），由钛和铝构成的金属层（28）和由铝构成的金属填充物（29）。 在半导体衬底上还存在n型半导体器件（100），该半导体衬底包括包括栅极电介质的第二栅极结构，由钛和铝构成的金属层和由铝构成的金属填充物。 层间电介质（30）存在于半导体衬底上。 层间电介质包括到p型和n型半导体器件的源区和漏区的互连（80）。 互连由钛和铝构成的金属层和由铝组成的金属填充物构成。 本公开还提供了形成上述结构的方法。

    Method for forming refractory metal-silicon-nitrogen capacitors and structure formed
    15.
    发明专利
    Method for forming refractory metal-silicon-nitrogen capacitors and structure formed 有权
    形成金属 - 硅 - 氮电容器和结构形式的方法

    公开(公告)号：JP2003060084A

    公开(公告)日：2003-02-28

    申请号：JP2002149960

    申请日：2002-05-24

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

    Inventor： CYRILLE CABRAL JR ,  CLEVENGER LAWRENCE ,  HSU LOUIS ,  WONG KEITH KWONG HON

    IPC: C23C14/00 ,  C23C14/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L28/75 ,  C23C14/0073 ,  C23C14/0641 ,  H01L21/2855 ,  H01L21/28568

    Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a capacitor at a source position inside a semiconductor structure.
    SOLUTION: In the method, a pre-processed semiconductor substrate is first positioned in a sputtering chamber. Ar gas is then flown into the sputtering chamber to deposit by sputtering a first refractory metal-silicon-nitrogen layer 14 on the substrate from a refractory metal silicide target, or from two targets of a refractory metal and a silicon. N
    2 gas is then flown into the sputtering chamber until that the concentration of N
    2 gas in the camber is at least 35% to deposit by sputtering a second refractory metal-silicon-nitrogen layer 16 on top of the first refractory metal-silicon-nitrogen layer. The N
    2 gas flow is then stopped to deposit by sputtering a third refractory metal-silicon-nitrogen layer 18 on top of the second refractory metal-silicon-nitrogen layer. The multi- layer stack of the refractory metal-silicon-nitrogen is then photolithographically formed into the capacitor.
    COPYRIGHT: (C)2003,JPO

    Abstract translation: 要解决的问题：提供一种在半导体结构内的源极位置形成电容器的方法。 解决方案：在该方法中，首先将预处理的半导体衬底放置在溅射室中。 然后通过从难熔金属硅化物靶或从难熔金属和硅的两个靶溅射基底上的第一难熔金属硅 - 氮层14，将Ar气体流入溅射室中。 然后将N 2气体流入溅射室，直到通过在第一耐火金属 - 硅 - 氮层的顶部溅射第二难熔金属 - 硅 - 氮层16来沉积外弧中的N 2气体的浓度至少为35％ 。 然后通过在第二难熔金属 - 硅 - 氮层的顶部溅射第三耐火金属 - 硅 - 氮层18来停止N2气流以沉积。 然后将难熔金属硅 - 氮的多层堆叠光刻形成电容器。

    METAL GATE AND HIGH-k DIELECTRIC DEVICE WITH PFET CHANNEL SiGe
    17.
    发明专利
    METAL GATE AND HIGH-k DIELECTRIC DEVICE WITH PFET CHANNEL SiGe 有权
    具有PFET通道SiGe的金属栅极和高k介质器件

    公开(公告)号：JP2011066406A

    公开(公告)日：2011-03-31

    申请号：JP2010197286

    申请日：2010-09-03

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： DORIS BRUCE B ,  CHENG KANGGUO ,  WONG KEITH KWONG HON

    IPC: H01L21/8238 ,  H01L21/28 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49

    CPC classification number: H01L21/823807 ,  H01L21/823842 ,  H01L21/823857

    Abstract: PROBLEM TO BE SOLVED: To provide a PFET including a channel formed of SiGe, and including a metal gate and a high-k gate dielectric. SOLUTION: An SiGe layer 10 is epitaxially grown on an Si surface; a high-k dielectric and a metal are blanket-arranged on a SiGe layer; gatestacks are formed; thereafter a gate dielectric on an NFET side and the SiGe layer are removed; and a second high-k dielectric 53 and a second metal 52 are arranged. A PFET comprises a gate dielectric having a high-k dielectric on an SiGe channel 10, a gate containing a metal, and a source/drain having silicide. The NFET comprises the second high-k dielectric 53, a gate including the second metal 52, and a source/drain having silicide. An epitaxial SiGe layer on a substrate surface is formed only in a channel of the PFET. PFET and NFET device parameters can be separately optimized by compositions of the respective gate dielectrics and gatestacks. COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供包括由SiGe形成的沟道并包括金属栅极和高k栅极电介质的PFET的PFET。 解决方案：SiGe层10在Si表面上外延生长; 高k电介质和金属被覆盖布置在SiGe层上; gatestacks形成; 此后去除NFET侧的栅电介质和SiGe层; 并且布置有第二高k电介质53和第二金属52。 PFET包括在SiGe沟道10上具有高k电介质的栅极电介质，含有金属的栅极和具有硅化物的源极/漏极。 NFET包括第二高k电介质53，包括第二金属52的栅极和具有硅化物的源极/漏极。 衬底表面上的外延SiGe层仅形成在PFET的沟道中。 PFET和NFET器件参数可以通过相应栅极电介质和放样的组成分别进行优化。 版权所有（C）2011，JPO＆INPIT

    Method of forming heat-resistant metal-silicon-nitrogen capacitor, and its structure
    18.
    发明专利
    Method of forming heat-resistant metal-silicon-nitrogen capacitor, and its structure 有权
    形成耐热金属 - 氮 - 硝酸电容器的方法及其结构

    公开(公告)号：JP2007306008A

    公开(公告)日：2007-11-22

    申请号：JP2007141486

    申请日：2007-05-29

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： CYRILLE CABRAL JR ,  CLEVENGER LAWRENCE ,  HSU LOUIS ,  WONG KEITH KWONG HON

    IPC: H01L21/8242 ,  C23C14/00 ,  C23C14/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/318 ,  H01L27/108

    CPC classification number: H01L28/75 ,  C23C14/0073 ,  C23C14/0641 ,  H01L21/2855 ,  H01L21/28568

    Abstract: PROBLEM TO BE SOLVED: To provide the method of forming a capacitor on an original position in a semiconductor structure.
    SOLUTION: First, a previously-treated semiconductor substrate is positioned in a sputtering chamber. Then, Ar gas is flown into the sputtering chamber and a first heat-resistant metal-silicon-nitrogen layer is adhered in a sputtering manner onto the substrate from the target of heat-resistant metal silicide or two targets of heat-resistant metal and silicon. Then, N
    2 gas is flown into the sputtering chamber until the density of N
    2 gas in the chamber reaches at least 35%, and a second heat-resistant metal-silicon-nitrogen layer is adhered in the sputtering manner onto the first heat-resistant metal-silicon-nitrogen layer. Then, the flow of N
    2 gas is stopped and a third heat-resistant metal-silicon-nitrogen layer is adhered in the sputtering manner onto the second heat-resistant metal-silicon-nitrogen layer. Then, the multilayer stack of heat-resistant metal-silicon-nitrogen is formed on the capacitor using photolithography.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供在半导体结构中的原始位置形成电容器的方法。 解决方案：首先，将预先处理的半导体衬底放置在溅射室中。 然后，将Ar气体流入溅射室，并且将第一耐热金属硅 - 氮层从耐热金属硅化物的靶或两个耐热金属和硅的靶以溅射方式附着到基板上 。 然后，将N 2 气体流入溅射室，直到室内的N 2 SB 2气体的密度达到至少35％，而第二耐热金属硅 - 氮层以溅射方式粘附到第一耐热金属 - 硅 - 氮层上。 然后，停止N SB 2气体的流动，并且以溅射方式将第三耐热金属 - 硅 - 氮层粘附到第二耐热金属 - 硅 - 氮层上。 然后，使用光刻法在电容器上形成多层叠层的耐热金属硅 - 氮。 版权所有（C）2008，JPO＆INPIT

    Conductor-dielectric structure, and method for manufacturing same
    19.
    发明专利
    Conductor-dielectric structure, and method for manufacturing same 有权
    导体 - 电介质结构及其制造方法

    公开(公告)号：JP2007150298A

    公开(公告)日：2007-06-14

    申请号：JP2006310984

    申请日：2006-11-17

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： RATH DAVID L ,  CHIN CHAO YANG ,  SHOM PONOTH ,  WONG KEITH KWONG HON

    IPC: H01L21/768

    CPC classification number: H01L21/76843 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089

    Abstract: PROBLEM TO BE SOLVED: To provide a conductor-dielectric structure, and to provide a method for manufacturing the same. SOLUTION: A structure containing a dielectric layer which contains a feature formed by patterning inside it, is prepared for a conductor-dielectric mutual connection structure. A plating seed layer is allowed to stick to the surface of the dielectric layer in the pattern-forming feature. A sacrificial seed layer is allowed to stick to the surface of the plating seed layer in the pattern-forming feature. The thickness of the sacrificial seed layer is reduced by inverse plating. A conductive metal is plated on the surface of the sacrificial seed layer in the pattern-forming feature. In addition, such structure is provided too as contains a dielectric layer comprising the pattern-forming feature inside it, a plating seed layer on the surface of the dielectric layer in the pattern-forming feature, and a discontinuous sacrificial seed layer positioned in the pattern-forming feature. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供导体 - 电介质结构，并提供其制造方法。 解决方案：制备一种包含介电层的结构，其中包含通过在其内部图案形成的特征而形成的特征，用于导体 - 电介质互连结构。 允许电镀种子层在图案形成特征中粘附到电介质层的表面。 允许牺牲种子层在图案形成特征中粘附到电镀种子层的表面。 牺牲种子层的厚度通过反镀减少。 在图案形成特征中，导电金属被电镀在牺牲种子层的表面上。 此外，也提供这样的结构，其包含其内部的图案形成特征的电介质层，在图案形成特征中的电介质层的表面上的电镀种子层和位于图案中的不连续的牺牲种子层 形成特征。 版权所有（C）2007，JPO＆INPIT

    MICRO-CAVITY MEMS DEVICE AND METHOD OF FABRICATING SAME
    20.
    发明申请
    MICRO-CAVITY MEMS DEVICE AND METHOD OF FABRICATING SAME 审中-公开
    微孔MEMS器件及其制造方法

    公开(公告)号：WO2007027813A3

    公开(公告)日：2007-12-06

    申请号：PCT/US2006033924

    申请日：2006-08-30

    Applicant: IBM ,  HSU LOUIS C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  RADENS CARL J ,  WONG KEITH KWONG HON ,  YANG CHIH-CHAO

    Inventor： HSU LOUIS C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  RADENS CARL J ,  WONG KEITH KWONG HON ,  YANG CHIH-CHAO

    IPC: H01P1/10

    CPC classification number: H01H50/005 ,  H01H2050/007 ,  Y10T29/4902 ,  Y10T29/49105 ,  Y10T29/49147

    Abstract: A MEM switch is described having a free moving element (140) within in micro-cavity (40), and guided by at least one inductive element. The switch consists of an upper inductive coil (170); an optional lower inductive coil (190), each having a metallic core (180,200) preferably made of permalloy; a micro-cavity (40); and a free-moving switching element (140) also made of magnetic material. Switching is achieved by passing a current through the upper coil, inducing a magnetic field in the coil element. The magnetic field attracts the free-moving magnetic element upwards, shorting two open wires (M_I M_r) and thus, closing the switch. When the current flow stops or is reversed, the free-moving magnetic element drops back by gravity to the bottom of the micro-cavity and the wires open. When gravity cannot be used, a lower coil becomes necessary to pull the free-moving switching element back and holding it at its original position.

    Abstract translation: 描述了一种MEM开关，其具有在微腔（40）内的自由移动元件（140），并由至少一个电感元件引导。 开关由上部感应线圈（170）组成; 可选的下感应线圈（190），每个具有优选由坡莫合金制成的金属芯（180,200） 微腔（40）; 以及也由磁性材料制成的自由移动的开关元件（140）。 通过使电流通过上部线圈来实现切换，从而在线圈元件中产生磁场。 磁场向上吸引自由移动的磁性元件，使两根开放的导线（M_I M_r）短路，从而闭合开关。 当电流停止或反转时，自由移动的磁性元件通过重力返回到微腔的底部并且电线打开。 当不能使用重力时，需要下部线圈将自由移动的开关元件拉回并将其保持在其原始位置。

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