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    12.
    发明专利
    未知

    公开(公告)号：DE59709973D1

    公开(公告)日：2003-06-05

    申请号：DE59709973

    申请日：1997-02-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ZETTLER THOMAS ,  WINNERL JOSEF ,  GEORGAKOS GEORG ,  POCKRANDT WOLFGANG

    IPC: H01L21/82 ,  B29C65/02 ,  B29L31/26 ,  H01L23/525 ,  H01L23/535 ,  H01L27/02

    Abstract: The invention relates to a separable connecting bridge (fuse) with an electrically conductive, longitudinally continuous conductive track (1) of a given width transversely to its length of a second type of conductivity opposite to the first, said track being formed in a substrate (2, 2a) of a first type of conductivity, where the semiconductor material of the first type of conductivity has a concentration in relation to the material of the conductive track such that, at a predetermined activation temperature which is higher than the operating temperature of the connecting bridge (12, 13), an interruption takes place over the entire width (m) of the conductive track (1) through the diffusion of the semiconductor material of the first type of conductivity and/or the material of the conductive track (1) of the second type of conductivity. 00000

    13.
    发明专利
    未知

    公开(公告)号：DE59707516D1

    公开(公告)日：2002-07-18

    申请号：DE59707516

    申请日：1997-07-10

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ZELLNER ANGELA ,  RAESCHMEIER ANDREAS ,  POCKRANDT WOLFGANG

    IPC: H01L21/822 ,  G06F1/00 ,  G06F12/14 ,  G06F21/87 ,  H01L23/525 ,  H01L23/544 ,  H01L23/58 ,  H01L27/04

    Abstract: A semiconductor circuit, in particular for use in an integrated module, has at least one operational assembly with a drive circuit, such as a microprocessor, and a data memory. The semiconductor circuit has at least one initialization assembly for testing and/or for initializing the operational assembly. A disconnectable connecting line connects the operational assembly to the initialization assembly. In order to increase reliability, the initialization assembly is permanently disconnected from the operational assembly, by disconnecting the connecting lines, after the semiconductor circuit has been completed. In order to make it more difficult to reactivate the disconnected connecting lines, the semiconductor circuit has a potential line connected to the initialization assembly and/or to the operational assembly in a region of the connecting line. The initialization assembly and/or the operational assembly are configured in such a way that, when the potential line is connected to the connecting line, the initialization assembly is placed in an inactive state.

    14.
    发明专利
    未知

    公开(公告)号：DE19730116C2

    公开(公告)日：2001-12-06

    申请号：DE19730116

    申请日：1997-07-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： POCKRANDT WOLFGANG ,  SEDLAK HOLGER ,  VIEHMANN HANS-HEINRICH

    IPC: G11C16/04 ,  G11C16/06 ,  G11C11/413

    Abstract: The invention relates to a semiconductor memory having a non-volatile two-transistor memory cell which has an N-channel selection transistor and an N-channel memory transistor. The drive circuitry for the cell includes a P-channel transfer transistor. A transfer channel is connected to a row line leading to the memory cell. This enables the voltages required for programming to be obtained with relatively little technological complexity.

    15.
    发明专利
    未知

    公开(公告)号：BR9914136A

    公开(公告)日：2001-06-19

    申请号：BR9914136

    申请日：1999-09-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GAIL MARKUS ,  WEDEL ARMIN ,  HESS ERWIN ,  POCKRANDT WOLFGANG

    IPC: G06F12/14 ,  G06F21/02 ,  G06F21/24 ,  G06K19/073 ,  G07F7/10 ,  G11C16/10 ,  H03K19/173

    Abstract: A circuit configuration includes at least one nonvolatile, electrically erasable and writable memory area. Each memory area is assigned a nonvolatile, electrically writable and erasable flag memory, which is connected through an address line, a programming line and an authentication line to the assigned memory area, a programming voltage source and a data verification circuit. In the event of an alteration in the content of a memory area, the state of the associated flag memory is changed and, after verification of the programmed memory area content, the flag memory is returned to its basic state.

    16.
    发明专利
    未知

    公开(公告)号：BR9810617A

    公开(公告)日：2000-09-12

    申请号：BR9810617

    申请日：1998-04-09

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： POCKRANDT WOLFGANG

    IPC: G06F1/00 ,  G06F12/14 ,  G06F15/16 ,  G06F21/44 ,  H04L29/06

    Abstract: The system checks whether authorization exists for at least two data processing devices to exchange data with one another. In the preferred embodiment, both data processing devices are of identical design. Check data are simultaneously produced, in response to a trigger signal, in both data processing devices. The check data are compared with one another in the data processing device to which a control function has been allocated.

    19.
    发明专利
    未知

    公开(公告)号：AT268928T

    公开(公告)日：2004-06-15

    申请号：AT00993194

    申请日：2000-11-27

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ALLINGER ROBERT ,  POCKRANDT WOLFGANG

    IPC: G06M3/12 ,  G07F7/08 ,  G07F7/10 ,  H03K21/40

    Abstract: A method for operating a multistage counter in only one counting direction is described. The counting value of a single-stage auxiliary counter that can be changed in only one counting direction is changed in predetermined counting values of the multistage counter. The respective counting value states of the multistage counter and of the single-stage auxiliary counter are registered. First authenticity data is generated by logically linking the counting value of the auxiliary counter to supplementary data.

    20.
    发明专利
    未知

    公开(公告)号：AT239302T

    公开(公告)日：2003-05-15

    申请号：AT97914128

    申请日：1997-02-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ZETTLER THOMAS ,  WINNERL JOSEF ,  GEORGAKOS GEORG ,  POCKRANDT WOLFGANG

    IPC: H01L21/82 ,  B29C65/02 ,  B29L31/26 ,  H01L23/525 ,  H01L23/535 ,  H01L27/02

    Abstract: The invention relates to a separable connecting bridge (fuse) with an electrically conductive, longitudinally continuous conductive track (1) of a given width transversely to its length of a second type of conductivity opposite to the first, said track being formed in a substrate (2, 2a) of a first type of conductivity, where the semiconductor material of the first type of conductivity has a concentration in relation to the material of the conductive track such that, at a predetermined activation temperature which is higher than the operating temperature of the connecting bridge (12, 13), an interruption takes place over the entire width (m) of the conductive track (1) through the diffusion of the semiconductor material of the first type of conductivity and/or the material of the conductive track (1) of the second type of conductivity. 00000

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