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公开(公告)号:DE10162542A1
公开(公告)日:2003-04-10
申请号:DE10162542
申请日:2001-12-19
Applicant: INFINEON TECHNOLOGIES AG
Inventor: STADLER WOLFGANG , BARGSTAEDT-FRANKE SILKE , ESMARK KAI , GOSSNER HARALD , STREIBL MARTIN , WENDEL MARTIN , RIESS PHILIPP
IPC: H01L23/544 , H01L23/60 , H01L21/66
Abstract: The method involves common production of an integrated circuit and a test structure using the same process steps, measuring electrical parameters on the test structure, driving characteristic values from the measured parameter values that characterize an electrostatic discharge/latch-up characteristic of the integrated circuit and checking whether they are in a define range selected to achieve desired electrostatic discharge/latch-up behavior.
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公开(公告)号:DE10103297A1
公开(公告)日:2002-08-22
申请号:DE10103297
申请日:2001-01-25
Applicant: INFINEON TECHNOLOGIES AG
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公开(公告)号:DE10126800B4
公开(公告)日:2010-07-01
申请号:DE10126800
申请日:2001-06-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WENDEL MARTIN , OWEN RICHARD , GOSSNER HARALD , STADLER WOLFGANG , RIESS PHILIPP , STREIBL MARTIN , ESMARK KAI
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公开(公告)号:DE10201056B4
公开(公告)日:2007-06-21
申请号:DE10201056
申请日:2002-01-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: STREIBL MARTIN , GOSNER HARALD , ESMARK KAI , BARGSTAEDT-FRANKE SILKE , STADLER WOLFGANG , WENDEL MARTIN
IPC: H01L23/60 , H01L27/02 , H01L27/082
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公开(公告)号:DE102005028919A1
公开(公告)日:2006-12-28
申请号:DE102005028919
申请日:2005-06-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RIESS PHILIPP , WENDEL MARTIN , FEICK HENNING
Abstract: An electronic component comprises: a doped substrate; at least one connection region formed in the doped substrate; at least one additional doped region formed in the doped substrate at least below the at least one connection region, where the at least one doped region is formed as an electrostatic discharges (ESD) region for protection against electrostatically generated discharges; at least one well region formed in the doped substrate, where the well region is formed in such a way that the well region doping is blocked at least below the at least one doped region. An independent claim is included for producing the electronic component involving: doping the substrate with doping atoms to form forming at least one connection region of the electronic component in the substrate; doping the substrate with doping atoms to form at least one doped region in the substrate located at least below the at least one connection region; and doping the substrate with doping atoms to form at least one well region in the substrate, where the well region doping is blocked at least below the at least one doped region in such a way that the doping intensity in each region blocked from the well region doping corresponds to the doping intensity of the substrate or remains unchanged until the end of the production of the electronic component.
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公开(公告)号:DE10255130A1
公开(公告)日:2004-06-17
申请号:DE10255130
申请日:2002-11-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor: STREIBL MARTIN , ESMARK KAI , WENDEL MARTIN , STADLER WOLFGANG , GOSNER HARALD
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公开(公告)号:DE10249859A1
公开(公告)日:2004-05-19
申请号:DE10249859
申请日:2002-10-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WENDEL MARTIN , ESMARK KAI , STREIBL MARTIN , BARGSTAEDT-FRANKE SILKE , HANKE ANDRE , SEIPPEL DIETOLF
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公开(公告)号:DE10126800A1
公开(公告)日:2002-12-12
申请号:DE10126800
申请日:2001-06-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WENDEL MARTIN , OWEN RICHARD , GOSSNER HARALD , STADLER WOLFGANG , RIESS PHILIPP , STREIBL MARTIN , ESMARK KAI
Abstract: The method involves monitoring a direct current characteristic of a semiconducting component (1) and drawing a conclusion regarding the electrostatic discharge resistance of the semiconducting component. A direct current failure threshold is monitored to determine the electrostatic discharge resistance of the semiconducting component. AN Independent claim is also included for an arrangement for testing electrostatic discharge resistance of semiconducting component.
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公开(公告)号:DE10054184C1
公开(公告)日:2002-04-04
申请号:DE10054184
申请日:2000-11-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WENDEL MARTIN , GUGGENMOS XAVER , STADLER WOLFGANG
Abstract: The transistor has source and drain diffusion zones (16,17), with a gate electrode (12) positioned between them, the layer resistance of the source and drain diffusion zones increased by provision of a number of insulating strip zones (23) extending through the diffusion zones. The longitudinal direction of the insulating strip zones is perpendicular to the channel region, with the ends of the insulating strip zones spaced from the channel region.
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20.
公开(公告)号:DE102005028919B4
公开(公告)日:2010-07-01
申请号:DE102005028919
申请日:2005-06-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RIESS PHILIPP , WENDEL MARTIN , FEICK HENNING
IPC: H01L23/60
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