公开(公告)号：WO2017111769A1

公开(公告)日：2017-06-29

申请号：PCT/US2015/000160

申请日：2015-12-22

Applicant: INTEL CORPORATION

Inventor： KAMGAING, Telesphor ,  DOGIAMIS, Georgios, C. ,  NAIR, Vijay, K. ,  FALCON, Javier, A. ,  LIFF, Shawna, M. ,  TOMITA, Yoshihiro

IPC: H01L23/66 ,  H01L23/48 ,  H01L25/065

CPC classification number: H01L23/48 ,  H01L23/66 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15192 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104

Abstract: Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The microelectronic device also includes a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

Abstract translation: 本发明的实施例包括微电子器件，其包括具有化合物半导体组件的第一硅基衬底。 微电子器件还包括耦合到第一衬底的第二衬底。 第二基板包括用于以大约4GHz或更高的频率发送和接收通信的天线单元。

公开(公告)号：WO2015047330A1

公开(公告)日：2015-04-02

申请号：PCT/US2013/062388

申请日：2013-09-27

Applicant: INTEL CORPORATION

Inventor： KAMGAING, Telesphor ,  RAO, Valluri R.

IPC: H01L23/48

CPC classification number: H01L23/66 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06582

Abstract: A die package is described that includes a substrate to carry passive components. In one example, the package has a semiconductor die having active circuitry near a front side of the die and having a back side opposite the front side, and a component substrate near the back side of the die. A plurality of passive electrical components are on the component substrate and a conductive path connects a passive component to the active circuitry. The die has a silicon substrate between the front side and the back side and the conductive path is a through-silicon via through the die from the back side to the active circuit.

Abstract translation: 描述了包括用于承载无源部件的基板的管芯封装。 在一个示例中，封装具有半导体管芯，该半导体管芯具有靠近管芯前侧的有源电路，并且具有与正面相反的背面和靠近管芯背侧的部件衬底。 多个无源电组件在组件衬底上，并且导电路径将无源组件连接到有源电路。 裸片在前侧和后侧之间具有硅衬底，并且导电路径是从后侧到有源电路的通过裸片的穿硅通孔。

公开(公告)号：WO2015047257A1

公开(公告)日：2015-04-02

申请号：PCT/US2013/061762

申请日：2013-09-25

Applicant: INTEL CORPORATION ,  TEH, Weng Hong ,  IBRAHIM, Tarek A. ,  HANEY, Sarah K. ,  SOBIESKI, Daniel N. ,  ZANTYE, Parshuram B. ,  MAIR, Chad E. ,  KAMGAING, Telesphor

Inventor： TEH, Weng Hong ,  IBRAHIM, Tarek A. ,  SOBIESKI, Daniel N. ,  ZANTYE, Parshuram B. ,  MAIR, Chad E. ,  KAMGAING, Telesphor

IPC: H01L29/84

CPC classification number: B81C1/00246 ,  B81B2201/0271 ,  B81C1/00261 ,  B81C1/00277 ,  H01L21/568 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2924/01079

Abstract: Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure.

Abstract translation: 用于提供半导体封装的精确制造结构的技术和机构。 在一个实施例中，半导体封装的积聚载体包括多孔介电材料层。 种子铜和电镀铜设置在多孔电介质材料层上。 进行随后的蚀刻以去除邻近多孔介电材料层的铜，形成将MEMS结构的悬置部分与多孔介电材料层分开的间隙。 在另一个实施例中，半导体封装包括设置在绝缘层的一部分之间或者氮化硅材料层的一部分的铜结构。 氮化硅材料层将绝缘层耦合到另一绝缘层。 每个绝缘层中的一个或两个保护层不受去离子处理的剥离层结构的剥离。

公开(公告)号：WO2013147744A1

公开(公告)日：2013-10-03

申请号：PCT/US2012/030634

申请日：2012-03-26

Applicant: INTEL CORPORATION ,  KAMGAING, Telesphor

Inventor： KAMGAING, Telesphor

IPC: H01Q1/38

CPC classification number: H01Q1/2283 ,  H01Q21/0025 ,  H01Q21/0087 ,  Y10T29/49016

Abstract: A high performance antenna incorporated on a microelectronic substrate by forming low-loss dielectric material structures in the microelectronic substrates and forming the antenna on the low-loss dielectric material structures. The low-loss dielectric material structures may be fabricated by forming a cavity in a build-up layer of the microelectronic substrate and filling the cavity with a low-loss dielectric material.

Abstract translation: 通过在微电子衬底中形成低损耗介电材料结构并在低损耗介电材料结构上形成天线，将高性能天线结合在微电子衬底上。 低损耗介电材料结构可以通过在微电子衬底的堆积层中形成空腔并用低损耗介电材料填充空腔来制造。

公开(公告)号：EP4268278A1

公开(公告)日：2023-11-01

申请号：EP20967194.0

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： ACIKALIN, Tolga ,  YANG, Tae, Young ,  CHOUDHURY, Debabani ,  YAMADA, Shuhei ,  DOOSTNEJAD, Roya ,  NIKOPOUR, Hosein ,  KIPNIS, Issy ,  ORHAN, Oner ,  RAHMAN, Mehnaz ,  FOUST, Kenneth P. ,  HULL, Christopher, D. ,  KAMGAING, Telesphor ,  KARHADE, Omkar ,  PELLERANO, Stefano ,  SAGAZIO, Peter ,  VADLAMANI, Sai

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/532 ,  H01L23/66 ,  H01L23/498 ,  H01L23/48 ,  H01L23/522 ,  H01L23/538 ,  H01L25/065 ,  H01L23/50

公开(公告)号：EP3794673A1

公开(公告)日：2021-03-24

申请号：EP19804037.0

申请日：2019-04-25

Applicant: Intel Corporation

Inventor： DOGIAMIS, Georgios ,  ELSHERBINI, Adel A. ,  KAMGAING, Telesphor ,  BRAUNISCH, Henning ,  SWAN, Johanna M.

IPC: H01P3/16 ,  H01P3/12 ,  H01P11/00

公开(公告)号：EP2705572A2

公开(公告)日：2014-03-12

申请号：EP12779473.3

申请日：2012-04-27

Applicant: Intel Corporation

Inventor： KAMGAING, Telesphor

IPC: H01Q21/12

CPC classification number: H01Q1/1271 ,  H01L23/552 ,  H01L24/16 ,  H01L24/17 ,  H01L2223/6677 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32155 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01Q1/2283 ,  H01Q3/26 ,  H01Q21/0087 ,  H01Q21/0093 ,  H01Q21/065 ,  Y10T29/49016 ,  H01L2924/00

Abstract: A glass-based, high-performance 60 GHz/ mm-wave antenna includes cavities disposed in a phased-array antenna (PAA) substrate. The cavities are disposed below planar antenna elements. Emitter traces are disposed on the PAA substrate opposite the planar antenna elements and the emitter traces, the cavities, and the planar antenna elements are vertically aligned.

公开(公告)号：WO2022098342A1

公开(公告)日：2022-05-12

申请号：PCT/US2020/058622

申请日：2020-11-03

Applicant: INTEL CORPORATION

Inventor： THAKUR, Jayprakash ,  DEGANI, Ofir ,  KRONFELD, Ronen ,  RESHEF, Ehud ,  SUH, Seong-Youp, J. ,  SHOSHANA, Tal ,  MANN, Eytan ,  TAMRAKAR, Maruti ,  RAVI, Ashoke ,  CAMACHO PEREZ, Jose Rodrigo ,  HUUSARI, Timo Sakari ,  BOROKHOVICH, Eli ,  RUBIN, Amir ,  BENJAMIN, Ofer ,  YANG, Tae Young ,  SKINNER, Harry ,  LEE, Kwan Ho ,  LEE, Jaejin ,  HAN, Dong-Ho ,  GROSS, Shahar ,  SEGEV, Eran ,  KAMGAING, Telesphor

IPC: H04B1/50 ,  H04B1/00 ,  H04B1/44 ,  H01Q1/24

Abstract: In various aspects, a radio frequency circuit is provided. The radio frequency circuit may include a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.

公开(公告)号：WO2019132921A1

公开(公告)日：2019-07-04

申请号：PCT/US2017/068725

申请日：2017-12-28

Applicant: INTEL CORPORATION ,  DOGIAMIS, Georgios C. ,  KAMGAING, Telesphor ,  EID, Feras ,  NAIR, Vijay K. ,  SWAN, Johanna M.

Inventor： DOGIAMIS, Georgios C. ,  KAMGAING, Telesphor ,  EID, Feras ,  NAIR, Vijay K. ,  SWAN, Johanna M.

IPC: H03H9/145 ,  H03H9/25

Abstract: Embodiments of the invention include an acoustic wave resonator (AWR) module. In an embodiment, the AWR module may include a first AWR substrate and a second AWR substrate affixed to the first AWR substrate. In an embodiment, the first AWR substrate and the second AWR substrate define a hermetically sealed cavity. A first AWR device may be positioned in the cavity and formed on the first AWR substrate, and a second AWR device may be positioned in the cavity and formed on the second AWR substrate. In an embodiment, a center frequency of the first AWR device is different than a center frequency of the second AWR device. In additional embodiment of the invention, the AWR module may be integrated into a hybrid filter. The hybrid filter may include an AWR module and other RF passive devices embedded in a packaging substrate.

公开(公告)号：WO2019009875A1

公开(公告)日：2019-01-10

申请号：PCT/US2017/040554

申请日：2017-07-01

Applicant: INTEL CORPORATION ,  DOGIAMIS, Georgios ,  OSTER, Sasha ,  KAMGAING, Telesphor ,  EWY, Erich ,  ELSHERBINI, Adel ,  SWAN, Johanna

Inventor： DOGIAMIS, Georgios ,  OSTER, Sasha ,  KAMGAING, Telesphor ,  EWY, Erich ,  ELSHERBINI, Adel ,  SWAN, Johanna

IPC: H01P3/16 ,  H01P5/08 ,  H01Q1/50

Abstract: Embodiments of the invention include dielectric waveguides and connectors for dielectric waveguides. In an embodiment a dielectric waveguide connector may include an outer ring and one or more posts extending from the outer ring towards the center of the outer ring. In some embodiments, a first dielectric waveguide secured within the dielectric ring by the one or more posts. In another embodiment, an enclosure surrounding electronic components may include an enclosure wall having an interior surface and an exterior surface and a dielectric waveguide embedded within the enclosure wall. In an embodiment, a first end of the dielectric waveguide is substantially coplanar with the interior surface of the enclosure wall and a second end of the dielectric waveguide is substantially coplanar with the exterior surface of the enclosure wall.