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公开(公告)号:CA2670747A1
公开(公告)日:2008-06-12
申请号:CA2670747
申请日:2007-11-30
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: LIM JONG-SOO , SEO JAE-HYUN , LEE YONG-TAE , LEE SOO-IN , KIM HEUNG-MOOK , LEE JAE-YOUNG , EUM HO-MIN , PARK SUNG-IK
IPC: H04L25/20
Abstract: Provided are a distributed repeater for repeating output signals identica l to input signals through a channel different from that of main transmitter signals but identical to channels of other distributed repeaters, and a dis tributed repeating method thereof. The distributed repeater includes: a pre- processing unit configured to receive a radio frequency (RF) signal transmit ted from an external device and demodulate the RF signal into a baseband sig nal; an equalizer configured to equalize the baseband signal to correct a di stortion occurring on a transmission channel; an identification signal gener ation and insertion unit configured to generate an identification signal for identification of the distributed repeater and network conditioning, and in sert the identification signal in the equalized baseband signal; and a post- processing unit configured to convert the baseband signal from the identific ation signal generation and insertion unit into an RF signal, and send the R F signal.
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公开(公告)号:MX2007009955A
公开(公告)日:2007-09-26
申请号:MX2007009955
申请日:2006-02-16
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: JI KUM-RAN , KIM SUNG-HOON , LEE JAE-YOUNG , KIM SEUNG-WON , LEE SOO-IN , AHN CHIE-TEUK , KIM JAE-BUM , PARK HYUN-CHEOL
Abstract: Se proporciona un codificador para la correccion del error y mas particularmente un codificador para la correccion del error para un metodo de transmision mejorado del Comite del Sistema de Television Avanzado (ATSC) y un metodo para lo mismo. El codificador para la correccion del error para la transmision de television digital, que se sugiere en la busqueda presente, incluye un codificador robusto para codificar una entrada de un bit en los datos codificados robustos, un bloque de pre-codificacion para recibir los datos codificados robustos y realizar la pre-codificacion para por lo tanto producir una senal pre-codificada y un bloque de codificacion trellis para realizar la codificacion trellis en los datos codificados robustos y la senal pre-codificada.
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公开(公告)号:CA2616067A1
公开(公告)日:2007-01-25
申请号:CA2616067
申请日:2006-07-19
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM CHANG-JOONG , KIM SEUNG-WON , LEE HO-KYOUNG , AHN CHIETEUK , LEE SOO-IN , KIM SUNG-HOON , LEE JAE-YOUNG
IPC: H03M13/23
Abstract: Provided are a method of estimating an encoder for dual stream transmission, and an encoder using the same. The method includes the steps of : a) setting up the number of memories required for an encoder, a free distance condition for robust data, and a free distance condition for mixed stream of robust data and normal data; b) obtaining 1/2 rate encoder combinations that sustain backward compatibility with a typical trellis encoder; c) obtaining encoder combinations H that satisfy the free distance condition for the robust data and the free distance condition for the mixed stream from the 1/2 rate encoder combinations; d) obtaining relations between memories and input/output signals, which satisfy the encoder combinations H; and e) configuring an encoder according to the obtained relation between the memories and the input/output signals.
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公开(公告)号:CA2892166A1
公开(公告)日:2015-11-22
申请号:CA2892166
申请日:2015-05-21
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KWON SUN-HYOUNG , LIM BO-MI , LEE JAE-YOUNG , KIM HEUNG-MOOK , HUR NAM-HO
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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公开(公告)号:MX2015002226A
公开(公告)日:2015-08-19
申请号:MX2015002226
申请日:2015-02-19
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KIM HEUNG-MOOK , KWON SUN-HYOUNG , HUR NAM-HO , LEE JAE-YOUNG
Abstract: En la presente descripción se describe un entrelazador de bits, un dispositivo de modulación codificada de bits entrelazados (BICM) y un método de entrelazado de bits; el entrelazador de bits incluye una primera memoria, un procesador y una segunda memoria; la primera memoria almacena una palabra código de revisión de paridad de baja densidad (LDPC) que tiene una longitud de 64800 y un índice de código de 5/15; el procesador genera una palabra código entrelazada al entrelazar la palabra código de LDPC con un criterio de grupo de bits; el tamaño del grupo de bits corresponde a un factor paralelo de la palabra código de LDPC; la segunda memoria proporciona la palabra código entrelazada a un modulador para mapeo de 64 símbolos.
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公开(公告)号:CA2880594A1
公开(公告)日:2015-07-29
申请号:CA2880594
申请日:2015-01-28
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KWON SUN-HYOUNG , LEE JAE-YOUNG , KIM HEUNG-MOOK , HUR NAM-HO
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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17.
公开(公告)号:CA2614866C
公开(公告)日:2014-02-18
申请号:CA2614866
申请日:2006-07-11
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM SUNG-HOON , LEE JAE-YOUNG , KIM SEUNG-WON , LEE SOO-IN , AHN CHIETEUK , LEE HO-KYOUNG , KIM CHANG-JOONG
Abstract: Provided is a method for searching for an optimal coder suitable to a dual stream transmission method of a DTV transceiving apparatus, and an encoder and a decoder employing the optimal coder searching method. The optimal coder searching method includes the steps of: a) determining a mixed pattern of normal stream and robust stream; b) determining a trellis structure of the robust stream which is applied to the mixed pattern based on how coders are connected; c) forming a dual stream trellis by mixing a trellis of the normal stream, which is a normal stream trellis, and a trellis of the robust stream, which is a robust stream trellis; d) computing a free distance at departing points of the dual stream trellis structure based on a dual stream free distance computation termination condition; and e) determining the optimal coder based on the free distance.
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公开(公告)号:CA2561183C
公开(公告)日:2012-01-24
申请号:CA2561183
申请日:2005-04-01
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM SUNG-HOON , JI KUM-RAN , LEE JAE-YOUNG , KIM SEUNG-WON , LEE SOO-IN , AHN CHIETEUK
IPC: H04N7/015
Abstract: Provided are a Vestigial Side Band (VSB) Digital Television (DTV) transmitter and receiver based on the Advanced Television System Committee (ATSC) A/53, and a method thereof. The present invention provides 8-VSB DTV transmitter and receiver that can improve reception performance of the receiver by transmitting and double streams formed of normal data and robust data without increasing an average power level, regardless of the ratio of the normal data and robust data, by including an encoding unit for performing 16-state trellis coding on the robust data when a data stream includes robust data, and a method thereof.
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公开(公告)号:CA2698669A1
公开(公告)日:2009-03-12
申请号:CA2698669
申请日:2008-05-15
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: LEE JAE-YOUNG , PARK SUNG-IK , EUM HO-MIN , SEO JAE-HYUN , KIM HEUNG-MOOK , LIM JONG-SOO , LEE SOO-IN
IPC: H04B7/14
Abstract: Provided is an identification signal analyzing apparatus and method for compensating power of a channel profile occurring at a conventional identification signal analyzing apparatus by using a power compensation. The identification signal analyzing apparatus includes: an identification signal generator for generating an identification signal identical to a known identification signal inserted by a transmission device; a partial correlator for calculating a correlation value between a received signal including the known identification signal inserted by the transmission device and the identification signal generated by the identification signal generator through a partial correlation; a power compensator for compensating power of the correlation value calculated by the partial correlator; and a channel profile extractor for extracting a channel profile from the correlation value compensated by the power compensator.
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公开(公告)号:MXPA06011264A
公开(公告)日:2007-01-16
申请号:MXPA06011264
申请日:2005-04-01
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM SUNG-HOON , KIM SEUNG-WON , JI KUM-RAN , AHN CHIETEUK , LEE SOO-IN , LEE JAE-YOUNG
IPC: H04N7/015
Abstract: Se proporcionan un transmisor y un receptor de Television Digital (DTV) de Banda Lateral Residual (VSB) basados en el A/53 del Comite de Sistema de Television Avanzado (ATSC) y un metodo para los mismos. La presente invencion proporciona un transmisor y un receptor DTV de 8-VSB que puede mejorar el funcionamiento de la recepcion del receptor mediante transmitir y recibir los datos robustos mezclados con P-2VSB, E-4VSB y/o E-8VSB. El transmisor DTV incluye un medio de entrada para recibir un flujo de datos de video digitales incluyendo los datos normales y los datos robustos, un medio de codificacion para codificar el flujo de datos de video digitales y un medio de transmision para modular y transmitir una senal de salida de los medios de codificacion, en donde los medios de codificacion realizan la codificacion trellis de los datos robustos mediante mezclar y usar una pluralidad de metodos.
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