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公开(公告)号:AU2003221865A1
公开(公告)日:2003-10-27
申请号:AU2003221865
申请日:2003-04-09
Applicant: QUALCOMM INC
Inventor: WALKER BRETT C
Abstract: A charge pump circuit includes a charge pump current source configured for differential switching of an output current and a charge pump enable switch configured to turn on the charge pump current source prior to the differential switching of the output current and to turn off the charge pump current source after the differential switching of the output current, thereby saving a significant amount of current consumption by the charge pump circuit.
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公开(公告)号:AU4339602A
公开(公告)日:2002-06-24
申请号:AU4339602
申请日:2001-10-24
Applicant: QUALCOMM INC
Inventor: SEE PUAY HOE , PETERZELL PAUL E , WALKER BRETT C
Abstract: A zero Intermediate Frequency (IF) transmitter and receiver are implemented within a transceiver to eliminate interference in the receive band. An output of a tunable high oscillator to generate a frequency source that is an integer multiple of the desired transmit LO frequency. The frequency source is coupled to an amplitude limiter and frequency divider. The output of the frequency divider is used as the transmit LO to directly upconvert baseband signals to the desired output frequency without the need for an IF stage. Direct upconversion of the baseband transmit signals without an IF stage eliminates spurious frequency products that are produced in the receive band.
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公开(公告)号:CA2426934A1
公开(公告)日:2002-06-20
申请号:CA2426934
申请日:2001-10-24
Applicant: QUALCOMM INC
Inventor: SEE PUAY HOE , PETERZELL PAUL E , WALKER BRETT C
Abstract: A zero Intermediate Frequency (IF) transmitter and receiver are implemented within a transceiver to eliminate interference in the receive band. An outpu t of a tunable high oscillator to generate a frequency source that is an integ er multiple of the desired transmit LO frequency. The frequency source is coupl ed to an amplitude limiter and frequency divider. The output of the frequency divider is used as the transmit LO to directly upconvert baseband signals to the desired output frequency without the need for an IF stage. Direct upconversion of the baseband transmit signals without an IF stage eliminates spurious frequency products that are produced in the receive band.
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公开(公告)号:AU2007234638B2
公开(公告)日:2010-07-08
申请号:AU2007234638
申请日:2007-11-23
Applicant: QUALCOMM INC
Inventor: PETERZELL PAUL E , SIH GILBERT C , CHALLA RAGHU , HOLENSTEIN CHRISTIAN , KANG INJUP , LI TAO , WALKER BRETT C , RAGHUPATHY ARUN , SEVERSON MATTHEW L
Abstract: An apparatus and method in a wireless communication system, the apparatus comprising: first means for amplifying a received signal; means for cancelling a DC offset in the amplified signal; second means for digitally amplifying the DC offset cancelled signal; and means for measuring the digitally amplified signal and to control the gains of the first and second amplifying means.
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公开(公告)号:AU2002244049B8
公开(公告)日:2009-01-22
申请号:AU2002244049
申请日:2002-02-15
Applicant: QUALCOMM INC
Inventor: RAGHUPATHY ARUN , WALKER BRETT C , HOLENSTEIN CHRISTIAN , LI TAO , CHALLA RAGHU , KANG INJUP , PETERZELL PAUL E , SEVERSON MATTHEW L , SIH GILBERT C
Abstract: An apparatus and method in a wireless communication system, the apparatus comprising: first means for amplifying a received signal; means for cancelling a DC offset in the amplified signal; second means for digitally amplifying the DC offset cancelled signal; and means for measuring the digitally amplified signal and to control the gains of the first and second amplifying means.
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公开(公告)号:DE60135027D1
公开(公告)日:2008-09-04
申请号:DE60135027
申请日:2001-10-09
Applicant: QUALCOMM INC
Inventor: WALKER BRETT C , ZEISEL ERIC , SAHOTA GURKANWAL S
Abstract: Techniques to linearly (in dB) adjust the gains of variable gain elements (i.e., variable gain amplifiers or VGAs) in a receiver or transmitter. An input control signal is provided to a conditioning circuit that conditions the control signal to achieve various signal characteristics. The input control signal is limited to within a particular range of values, temperature compensated, scaled (or normalized) to the supply voltages, shifted with an offset, or manipulated in other fashions. The conditioned signal is then provided to an input stage of a linearizer that generates a set of exponentially related signals. This is achieved using, for example, a differential amplifier in which the conditioned control signal is applied to the inputs of the differential amplifier and the collector currents from the differential amplifier comprises the exponentially related signals. An output stage within the linearizer receives the exponentially related signals and, in response, generates a gain control signal. By approximately matching the output stage to a gain stage of the variable gain element and by using the gain control signal generated by output stage, the gain transfer function of the VGA approximates that of the exponentially related signals.
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公开(公告)号:BR0309161A
公开(公告)日:2005-06-07
申请号:BR0309161
申请日:2003-04-09
Applicant: QUALCOMM INC
Inventor: WALKER BRETT C
Abstract: A charge pump circuit includes a charge pump current source configured for differential switching of an output current and a charge pump enable switch configured to turn on the charge pump current source prior to the differential switching of the output current and to turn off the charge pump current source after the differential switching of the output current, thereby saving a significant amount of current consumption by the charge pump circuit.
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公开(公告)号:HK1060225A1
公开(公告)日:2004-07-30
申请号:HK04103147
申请日:2004-05-05
Applicant: QUALCOMM INC
Inventor: GARD KEVIN G , SAHOTA KAMAL GURKANWAL , WALKER BRETT C
Abstract: A device for use in a wireless communications system that reduces the amount of phase noise in the carrier signals due to powering down circuit elements for reducing power consumption. The device includes one or more carrier signal generators coupled to a transmitter. Each signal generator provides a respective carrier signal. The transmitter receives and modulates one or more carrier signals with one or more input signals to generate a modulated signal, which is gated on and off during a discontinnous data transmission. The transmitter includes one or more input buffers, with each input buffer receiving and buffering a respective carrier signal. The input buffers are maintained biased for the duration of the data transmission, even as the modulated signal is gated on and off, to provide a constant load for the signal generators and to isolate the carrier signal generators from switching noise. Some other active elements in the transmitter may be powered down when the modulated signal is gated off to further reduce power consumption.
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公开(公告)号:AU2003248839A1
公开(公告)日:2004-01-23
申请号:AU2003248839
申请日:2003-07-02
Applicant: QUALCOMM INC
Inventor: WALKER BRETT C
Abstract: A frequency generating circuit utilizes a quad modulus prescaler in which two control signals are used to select the prescaler modulus. The modulus control signals are generated by a multistage counter in which two independent counting stages are used to generate the first and second modulus control signals. The first modulus control signal is at a first logic level when the associated counter is at a non-zero value and is at a second logic level when the associated counter reaches zero. The second modulus control signal is generated by a second counter and has a first logic value when the second counter is in a non-zero state and a second logic value when the second counter reaches zero.
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公开(公告)号:AU2003209016A1
公开(公告)日:2003-09-02
申请号:AU2003209016
申请日:2003-02-04
Applicant: QUALCOMM INC
Inventor: MOLLENKOPF STEVEN M , SEE ANDREW , WALKER BRETT C
Abstract: A transmitter (108) converts a digital baseband signal input (150) for transmission by an antenna (114) to support multiple communication standards. An over-deviation phase multiplier (130) increases signal phase deviation by a factor of M. A digital phase modulator (176) applies trigonometric lookup tables. A digital intermediate frequency up-converter (132) up-shifts frequencies of desired signal content. First and second digital-to-analog converters (DACs) (134) and (136) use relatively low-bit operations, which add DAC noise (212). First and second low pass filters (138) and (140) apply rejection above frequencies of desired signal content. An analog I/Q modulator (142) converts from complex to real signals, adding an unwanted signal spaced from the desired signal content by an intermediate frequency multiple. A limiter (144) reduces amplitude modulated noise. An over-deviation phase divider (146) divides signal phase deviation by 1/M to reduce phase modulated noise.
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