Method for realigning crystal orientation of single crystal body
    11.
    发明专利
    Method for realigning crystal orientation of single crystal body 有权
    用于实现单晶体晶体取向的方法

    公开(公告)号:JP2014058444A

    公开(公告)日:2014-04-03

    申请号:JP2013235337

    申请日:2013-11-13

    CPC classification number: B24B7/22 B24B49/12

    Abstract: PROBLEM TO BE SOLVED: To provide a method for realigning a crystal orientation of a single crystal body such as a sapphire in the production of a single crystal for a semiconductor of a nitride material of group III and V elements, especially GaN.SOLUTION: A method for altering a crystal orientation of a single crystal body includes a step of analyzing the crystal orientation of a single crystal body and a step of calculating an angle of orientation difference between a selected crystal orientation of the single crystal body and a projection of crystal orientation along a first main outer surface of the single crystal body. The method further includes a step of removing a material from at least a part of the first main outer surface to alter the angle of orientation difference.

    Abstract translation: 要解决的问题:提供一种用于在制造用于III族氮化物材料的半导体的单晶的制造中的蓝宝石等单晶体的晶体取向的方法以及V族元素,特别是GaN。解决方案:A 用于改变单晶体的晶体取向的方法包括分析单晶体的晶体取向的步骤和计算单晶体的选定晶体取向与晶体取向投影之间的取向差角度的步骤 沿着单晶体的第一主外表面。 该方法还包括从第一主外表面的至少一部分去除材料以改变取向差的角度的步骤。

    ELECTROSTATIC CHUCK AND METHOD OF FORMING
    13.
    发明申请
    ELECTROSTATIC CHUCK AND METHOD OF FORMING 审中-公开
    静电切割和成型方法

    公开(公告)号:WO2009085991A2

    公开(公告)日:2009-07-09

    申请号:PCT/US2008087492

    申请日:2008-12-18

    CPC classification number: H02N13/00

    Abstract: An electrostatic chuck includes an insulating layer, a conductive layer overlying the insulating layer, a dielectric layer overlying the conductive layer, the dielectric layer having pores forming interconnected porosity, and a cured polymer infiltrant residing in the pores of the dielectric layer.

    Abstract translation: 静电卡盘包括绝缘层,覆盖绝缘层的导电层,覆盖导电层的电介质层,具有形成互连孔隙的孔的电介质层和驻留在电介质层的孔中的固化的聚合物渗透剂。

    MICROELECTRONIC PROCESSING COMPONENT HAVING A CORROSION-RESISTANT LAYER, MICROELECTRONIC WORKPIECE PROCESSING APPARATUS INCORPORATING SAME, AND METHOD OF FORMING AN ARTICLE HAVING THE CORROSION-RESISTANT LAYER
    15.
    发明申请
    MICROELECTRONIC PROCESSING COMPONENT HAVING A CORROSION-RESISTANT LAYER, MICROELECTRONIC WORKPIECE PROCESSING APPARATUS INCORPORATING SAME, AND METHOD OF FORMING AN ARTICLE HAVING THE CORROSION-RESISTANT LAYER 审中-公开
    具有耐腐蚀层的微电子加工组件,与其相容的微电子工件加工设备及形成具有耐腐蚀层的物品的方法

    公开(公告)号:WO2011049938A3

    公开(公告)日:2011-08-04

    申请号:PCT/US2010053176

    申请日:2010-10-19

    Abstract: A microelectronic processing component can include a substrate and a corrosion-resistant layer. The substrate can include a metal-containing material, and the corrosion-resistant layer can be adjacent to the surface region. The corrosion-resistant layer can include a first portion and a second portion each including a rare earth compound, wherein the first portion is disposed between the substrate and the second portion, and the first portion has a first porosity, and the second portion has a second porosity that is greater than the first porosity. The component can be component within a processing apparatus used to process microelectronic work pieces. In a particular embodiment, the component can be exposed to the processing conditions as seen by the microelectronic workpiece when fabrication a microelectronic device from the microelectronic workpiece. Methods can be used to achieve the difference in porosity, and such methods can be for articles other than microelectronic processing components.

    Abstract translation: 微电子处理部件可以包括基板和耐腐蚀层。 基板可以包括含金属的材料,并且耐腐蚀层可以与表面区域相邻。 耐腐蚀层可以包括第一部分和第二部分,每个部分包括稀土化合物,其中第一部分设置在基板和第二部分之间,第一部分具有第一孔隙,第二部分具有第一部分 第二孔隙率大于第一孔隙度。 组件可以是用于处理微电子工件的处理设备内的组件。 在特定实施例中,当从微电子工件制造微电子器件时,组件可以暴露于微电子工件所看到的处理条件。 可以使用方法来实现孔隙度的差异,并且这种方法可以用于微电子处理部件以外的物品。

    SEALED PLASMA COATINGS
    16.
    发明申请
    SEALED PLASMA COATINGS 审中-公开
    密封等离子体涂料

    公开(公告)号:WO2010147856A3

    公开(公告)日:2011-02-24

    申请号:PCT/US2010038342

    申请日:2010-06-11

    Abstract: A processing device includes a plurality of walls defining an interior space configured to be exposed to plasma and a surface coating on the interior surface of at least one of the plurality of walls. The surface coating includes pores forming interconnected porosity. The processing device further includes a sealant residing in at least a portion of the pores of the surface coating. In an embodiment, the sealant can be a thermally cured sealant having a cure temperature not greater than about 100C. In another embodiment, the sealant can be an epoxy sealant having a viscosity of not greater than 500 cP in liquid precursor form. In yet another embodiment, the sealant can be a low shrinkage sealant characterized by a solidification shrinkage of not greater than 8%.

    Abstract translation: 处理装置包括限定被配置为暴露于等离子体的内部空间的多个壁和多个壁中的至少一个的内表面上的表面涂层。 表面涂层包括形成互连孔隙的孔。 处理装置还包括位于表面涂层的孔的至少一部分中的密封剂。 在一个实施方案中,密封剂可以是固化温度不超过约100℃的热固化密封剂。 在另一个实施方案中,密封剂可以是液体前体形式的粘度不大于500cP的环氧密封剂。 在另一个实施方案中,密封剂可以是低收缩密封剂,其特征在于凝固收缩率不大于8%。

Patent Agency Ranking