11.
    发明专利
    未知

    公开(公告)号:DE60018587D1

    公开(公告)日:2005-04-14

    申请号:DE60018587

    申请日:2000-12-27

    Abstract: A circuit implementing a non-integer order dynamic system includes a neural network (1 to 5) adapted to receive at least one input signal (IS) and to generate therefrom at least one output signal (OS). The input and output signals (IS, OS) are related to each by a non-integer order integro-differential relationship through the coefficients of the neural network (1 to 5). A plurality (I, II) of such circuits, implementing respective non-integer order (PI D ) controllers can be interconnected in an arrangement wherein any of the integral (200) or differential (202) blocks included in one of those circuits generates a signal which is fed to any of the integral (200) or differential (204) blocks of another circuit in the system.

    13.
    发明专利
    未知

    公开(公告)号:DE69810625D1

    公开(公告)日:2003-02-13

    申请号:DE69810625

    申请日:1998-10-07

    Abstract: A method of controlling a flyback DC-DC converter, self-oscillating at steady state conditions, employing a transformer for storing and transferring energy to a load and having an auxiliary winding whose voltage, induced by the current flowing in the secondary winding of the transformer, is monitored to regulate the amount of energy being transferred by way of a primary control loop disabling and enabling the turning on of a power switch driving the primary winding of the transformer and to detect its the zero-crossing and consequently turn on the power switch for a new conduction and energy storage phase, the duration (TON) of which is established by a secondary control loop of the output voltage producing the turning off of the power switch for a new off phase (TOFF), and comprising a fixed frequency oscillator of a frequency lower than the self-oscillating frequency of the converter for start-up charge transient of an output filter capacitor, wherein the power transferred from the primary circuit to the secondary circuit of the flyback transformer is controlled by introducing a delay on the turn-on instant of the power switch in respect to a turn-on command generated, during a self-oscillating functioning phase upon sensing a zero crossing event and during a fixed frequency functioning phase, upon a rising front of the signal generated by said oscillator, in function of input variables of the enabling-disabling primary control loop and of the secondary control loop, regardless of the mode of control.

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