公开(公告)号：DE69319326D1

公开(公告)日：1998-07-30

申请号：DE69319326

申请日：1993-04-09

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： BONTEMPO GREGORIO ,  MILAZZO PATRIZIA ,  ALZATI ANGELO

IPC: H03K17/04 ,  H03K17/0412 ,  H03K17/16 ,  H03K17/687

Abstract: The turn-off delay time of a low-side driver (output power transistor), may be independently reduced and eventually made identical to the turn-on delay time by employing an auxiliary current generator that may be controlled by the same switching signal that controls a current generator employed for discharging the control node of the low-side driver, in order to provide an augmented discharging current during a first phase of a turn-off process. The contribution to the capacitance discharge current provided by said third current generator is automatically interrupted by means responsive to the voltage present on the driving node of the low-side driver, when it approaches saturation.

公开(公告)号：JPH09167955A

公开(公告)日：1997-06-24

申请号：JP12966396

申请日：1996-05-24

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： GOLA ALBERTO ,  LEONE VIA TERRAZZANO ,  FUCILI GIONA ,  MILAZZO PATRIZIA

IPC: H03K17/00 ,  H03K17/082 ,  H03K19/00 ,  H03K19/003 ,  H03K19/0175 ,  H04L25/02

Abstract: PROBLEM TO BE SOLVED: To provide the detection and protection circuit for occurrence of a short-circuit for a digital output stage. SOLUTION: The detection and protection circuit for occurrence of a short- circuit for a digital output stage is provided and the circuit has an exclusive OR logic gate circuit EX1 with a 1st input terminal connecting to a signal input circuit (IN) and an output terminal connecting to an input terminal of a signal level shifter B. An exclusive OR 2nd logic gate circuit EX2 has a 1st input terminal connecting to the input node IN and a 2nd input terminal connecting to an output terminal OUT of the output stage B via an inverter circuit INI. A 2nd input terminal of the 1st logic gate circuit is connected to an output terminal of the 2nd logic gate circuit via a comparator circuit SCH1 and delay circuit means consisting of C, R, D.

公开(公告)号：DE69732695D1

公开(公告)日：2005-04-14

申请号：DE69732695

申请日：1997-07-14

Applicant: ST MICROELECTRONICS SRL

Inventor： PULVIRENTI FRANCESCO ,  MILAZZO PATRIZIA

IPC: G05F1/565

Abstract: A linear type of voltage regulator, having at least one input terminal (VBAT) adapted to receive a supply voltage and one output terminal (VOUT) adapted to deliver a regulated output voltage, comprises a power transistor (M1) and a driver circuit for the transistor; the driver circuit comprises essentially an operational amplifier (OP1) having an input differential stage biased by a bias current which varies proportionally with the variations of the regulated output voltage at the output terminal (VOUT) of the regulator.

公开(公告)号：DE69808950D1

公开(公告)日：2002-11-28

申请号：DE69808950

申请日：1998-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： RIBELLINO CALOGERO ,  MILAZZO PATRIZIA ,  PULVIRENTI FRANCESCO

IPC: H03K4/02 ,  H03K17/16

Abstract: Integrated circuit (20, 80, 90) generating at least a voltage linear ramp having a slow rise of the type comprising an input terminal (21, 81, 91), connected to a first voltage reference (VREF) and an output terminal (24, 84, 94) adapted for providing a controlled ramp signal (VRAMP), the circuit comprising at least one operational amplifier (OP3) having a non-inverting input terminal connected to said input terminal (21, 81, 91) and to an output terminal in feedback on an inverting input terminal and connected to the output terminal (24, 84, 94) of the ramp generator circuit (20, 80, 90) itself. The ramp voltage generator (20, 80, 90) according to the invention further comprises a first storage capacitance (Cs) connected between the non-inverting input terminal of the operational amplifier (OP3) and a ground voltage reference (GND) and loaded by means of a second pumping capacitance (Cp) inserted in parallel to said first capacitance (Cs) between the input terminal (21, 81, 91) of the ramp generator circuit (20, 80, 90) and the ground voltage reference (GND).

公开(公告)号：DE60315614D1

公开(公告)日：2007-09-27

申请号：DE60315614

申请日：2003-06-18

Applicant: ST MICROELECTRONICS DES & APPL ,  ST MICROELECTRONICS SA ,  ST MICROELECTRONICS SRL

Inventor： CHESNAU DAVID ,  MERCANDANTE GIACOMO ,  MILAZZO PATRIZIA ,  BERNARD CHRISTOPHER

IPC: H02J7/00 ,  H02M1/08

Abstract: A circuit (225) for controlling a battery-charger device (200) with a closed-loop architecture is proposed. The circuit includes sensing means (230) for sensing an operative quantity of the device, means (245) for alternately controlling the sensing means to track the operative quantity during a tracking phase and to hold the operative quantity during a holding phase, and driving means (240) for providing a regulation signal, for regulating the operative quantity, according to a comparison between the sensed operative quantity and a reference value; the circuit of the invention further includes means (245;485-490) for causing the driving means to hold the regulation signal during at least part of each holding phase.

公开(公告)号：DE69825755D1

公开(公告)日：2004-09-23

申请号：DE69825755

申请日：1998-10-28

Applicant: ST MICROELECTRONICS SRL

Inventor： RIBELLINO CALOGERO ,  MILAZZO PATRIZIA

IPC: H03K19/0185

Abstract: The invention relates to a level shifter electronic device with very low consumption of current, of the type supplied between a first voltage reference (VOUT) of power supply and a second voltage reference (GND) and comprising a circuital portion (2) with differential cell having an output terminal (OUT) and at least a first (4) and a second (5) input terminal, on the output terminal a signal translated in level with respect to the signal present on one (4) of said input terminals, being drawn. The device further comprises an additional circuital portion (3) connected to a node (A) of the differential cell and comprising at least a pull-down component (9) inserted between said node and the second voltage reference (GND). The pull-down component (9) is a MOS transistor (M6) having the conduction terminals connected between said node (A) and the second voltage reference (GND) and the gate terminal connected to the first voltage reference (VOUT) of power supply by means of a series of transistors.

公开(公告)号：DE69808950T2

公开(公告)日：2003-12-24

申请号：DE69808950

申请日：1998-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： RIBELLINO CALOGERO ,  MILAZZO PATRIZIA ,  PULVIRENTI FRANCESCO

IPC: H03K4/02 ,  H03K17/16

Abstract: Integrated circuit (20, 80, 90) generating at least a voltage linear ramp having a slow rise of the type comprising an input terminal (21, 81, 91), connected to a first voltage reference (VREF) and an output terminal (24, 84, 94) adapted for providing a controlled ramp signal (VRAMP), the circuit comprising at least one operational amplifier (OP3) having a non-inverting input terminal connected to said input terminal (21, 81, 91) and to an output terminal in feedback on an inverting input terminal and connected to the output terminal (24, 84, 94) of the ramp generator circuit (20, 80, 90) itself. The ramp voltage generator (20, 80, 90) according to the invention further comprises a first storage capacitance (Cs) connected between the non-inverting input terminal of the operational amplifier (OP3) and a ground voltage reference (GND) and loaded by means of a second pumping capacitance (Cp) inserted in parallel to said first capacitance (Cs) between the input terminal (21, 81, 91) of the ramp generator circuit (20, 80, 90) and the ground voltage reference (GND).

公开(公告)号：ITTO990995A1

公开(公告)日：2001-05-16

申请号：ITTO990995

申请日：1999-11-16

Applicant: ST MICROELECTRONICS SRL

Inventor： RIBELLINO CALOGERO ,  MILAZZO PATRIZIA

IPC: H02M1/00 ,  H02M1/36

Abstract: A switch-type regulator with a soft-start function having an output terminal supplying an output voltage, and including an error amplifier, having a first input receiving a constant reference voltage, a second input receiving a feedback voltage dependent on the output voltage, and supplying a compensation terminal with an error voltage correlated to the difference between the reference voltage and the feedback voltage. The error amplifier includes a differential amplifier. The regulator also includes a compensation network connected to the compensation terminal. A soft-start function is obtained exploiting the compensation network.

公开(公告)号：DE602005025972D1

公开(公告)日：2011-03-03

申请号：DE602005025972

申请日：2005-02-11

Applicant: ST MICROELECTRONICS SRL

Inventor： RAGONESI GIANLUCA ,  MILAZZO PATRIZIA ,  MUSUMECI SALVATORE ,  PLATANIA GIUSEPPE

IPC: H05B44/00

公开(公告)号：ITMI992250A1

公开(公告)日：2001-04-28

申请号：ITMI992250

申请日：1999-10-28

Applicant: ST MICROELECTRONICS SRL

Inventor： RIBELLINO CALOGERO ,  MILAZZO PATRIZIA ,  PULVIRENTI FRANCESCO

IPC: H02J7/00

Abstract: A control circuit for controlling current of batteries at the end of the charging phase, especially for lithium batteries, including an input/output circuit, placed between a battery charger and a battery, and an output stage, including two transistors, wherein the resistance of one of the two transistors is modulated to increase the value of the total resistance and to cause a lower turning off current of said output stage.