公开(公告)号：JP2745433B2

公开(公告)日：1998-04-28

申请号：JP28455090

申请日：1990-10-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PALARA SERGIO ,  PAPARO MARIO ,  PELLICANO' ROBERTO

IPC: G05F1/10 ,  G05F1/56 ,  G05F3/22 ,  H01F7/18 ,  H03K17/16 ,  H03K17/615

公开(公告)号：DE69122598D1

公开(公告)日：1996-11-14

申请号：DE69122598

申请日：1991-12-18

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L21/82

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

公开(公告)号：DE69213675D1

公开(公告)日：1996-10-17

申请号：DE69213675

申请日：1992-11-27

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

公开(公告)号：IT1292096B1

公开(公告)日：1999-01-25

申请号：ITMI971333

申请日：1997-06-05

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： SIRNA GUGLIELMO ,  PALMISANO GIUSEPPE ,  PAPARO MARIO

IPC: H03K19/018

Abstract: A high-speed bipolar-to-CMOS logic converter circuit, including an input stage, including a differential amplifier meant to be connected to a bipolar-logic circuit portion and to be supplied by the supply voltage of the bipolar-logic portion, and an output stage, which is supplied by the voltage of a CMOS-logic circuit portion, a dynamic level shifting circuit interposed between the input stage and the output stage, the output stage being connected to the CMOS-logic circuit portion.

公开(公告)号：DE69213675T2

公开(公告)日：1997-02-27

申请号：DE69213675

申请日：1992-11-27

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

公开(公告)号：ITMI913265D0

公开(公告)日：1991-12-05

申请号：ITMI913265

申请日：1991-12-05

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

公开(公告)号：IT1252623B

公开(公告)日：1995-06-19

申请号：ITMI913265

申请日：1991-12-05

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L

Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

公开(公告)号：IT1246759B

公开(公告)日：1994-11-26

申请号：IT2257790

申请日：1990-12-31

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

公开(公告)号：ITMI912045A1

公开(公告)日：1993-01-25

申请号：ITMI912045

申请日：1991-07-24

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： BELLUSO MASSIMILIANO ,  PAPARO MARIO ,  ZISA MICHELE

IPC: H03K20060101 ,  H03F3/217 ,  H03K4/58 ,  H03K5/02 ,  H03K17/06 ,  H03K17/687 ,  H03K19/017

公开(公告)号：ITMI912045D0

公开(公告)日：1991-07-24

申请号：ITMI912045

申请日：1991-07-24

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： ZISA MICHELE ,  BELLUSO MASSIMILIANO ,  PAPARO MARIO

IPC: H03K4/58 ,  H03F3/217 ,  H03K5/02 ,  H03K17/06 ,  H03K17/687 ,  H03K19/017 ,  H03K

Abstract: In a bootstrap circuit for a power MOS transistor in the high driver configuration, comprising a first capacitor (C1) chargeable to a first voltage function of the supply voltage of the power transistor (T1), there is present a second capacitor (C2) combined with the first capacitor (C1) in such a way as to make available a second voltage higher than the first voltage and the threshold voltage of the power transistor (T1).