公开(公告)号：US10700049B2

公开(公告)日：2020-06-30

申请号：US16161080

申请日：2018-10-16

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Fu-Yang Chen

IPC: H01L25/16 ,  H01L23/00 ,  H01L25/075 ,  H01L33/62

Abstract: A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.

公开(公告)号：US11348869B2

公开(公告)日：2022-05-31

申请号：US17100932

申请日：2020-11-22

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chou Chen ,  Chun-Hsien Chien ,  Wen-Liang Yeh ,  Wei-Ti Lin

IPC: H01L23/04 ,  H01L23/522 ,  H01L23/00 ,  H01L21/50

Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.

公开(公告)号：US20210282277A1

公开(公告)日：2021-09-09

申请号：US17315357

申请日：2021-05-10

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Fu-Yang Chen

IPC: H05K3/46 ,  H05K3/00 ,  H05K3/40 ,  H05K1/11

Abstract: A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.

公开(公告)号：US11032917B2

公开(公告)日：2021-06-08

申请号：US16503500

申请日：2019-07-04

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Fu-Yang Chen

IPC: H05K7/10 ,  H05K3/46 ,  H05K3/00 ,  H05K3/40 ,  H05K1/11

Abstract: A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.

公开(公告)号：US20210057320A1

公开(公告)日：2021-02-25

申请号：US16690143

申请日：2019-11-21

Applicant: Unimicron Technology Corp.

Inventor： Fu-Yang Chen ,  Chun-Hsien Chien ,  Cheng-Hui Wu ,  Wei-Ti Lin

IPC: H01L23/498 ,  H01L21/48

Abstract: A method of preparing a package structure is provided, which includes providing a carrier plate including a supporting layer, a first release layer, and a first metal layer; forming a first dielectric layer over the first metal layer, the first dielectric layer having a plurality of holes, each of the holes having an end portion substantially coplanar with each other at a same plane; forming a plurality of conductive protrusions filling the holes, each of the conductive protrusions having a first end and a second end opposite thereto; forming a circuit layer structure including at least one circuit layer and at least one second dielectric layer, the circuit layer being connected to the second end, the second dielectric layer being disposed over the circuit layer; removing the carrier plate; and removing a portion of the first dielectric layer to expose the conductive protrusions. A package structure is also provided.

公开(公告)号：US20200075564A1

公开(公告)日：2020-03-05

申请号：US16161080

申请日：2018-10-16

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Fu-Yang Chen

IPC: H01L25/16 ,  H01L25/075 ,  H01L33/62 ,  H01L23/00

Abstract: A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.

公开(公告)号：US09854671B1

公开(公告)日：2017-12-26

申请号：US15410745

申请日：2017-01-19

Applicant: Unimicron technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Yu-Chung Hsieh ,  Yu-Hua Chen

IPC: H05K3/42 ,  H05K1/11 ,  H05K1/16 ,  H05K3/40 ,  H01F27/28 ,  H01F27/24

CPC classification number: H05K1/115 ,  H01F17/0013 ,  H01F17/0033 ,  H01F27/24 ,  H01F27/2804 ,  H01F2017/002 ,  H01F2027/2809 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/165 ,  H05K3/4076 ,  H05K3/42 ,  H05K3/423 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/086 ,  H05K2201/0959

Abstract: A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.

公开(公告)号：US20250149392A1

公开(公告)日：2025-05-08

申请号：US18395755

申请日：2023-12-26

Applicant: Unimicron Technology Corp.

Inventor： Chia Ching Wang ,  Chien-Chou Chen ,  Hsuan Ming Hsu ,  Ho-Shing Lee ,  Yunn-Tzu Yu ,  Yao Yu Chiang ,  Po-Wei Chen ,  Wei-Ti Lin ,  Wen Chi Chang

IPC: H01L23/12 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

Abstract: A package substrate includes a core layer, at least one functional component, at least one spacer, a filler, a first and a second build-up structures. The core layer has at least one opening and multiple conductive through vias. The functional component is disposed in the openings. The spacer is disposed on the functional component. The filler is filled in the opening, covering the functional component and spacer, and completely filling the gap between the opening, the functional component and the spacer. The first build-up structure is disposed on a first surface of the core layer and a third surface of the filler, and electrically connected to the functional component and the conductive through vias. The second build-up structure is disposed on a second surface of the core layer and a fourth surface of the filler, contacts the spacer and electrically connected to the conductive through vias.

公开(公告)号：US20210398894A1

公开(公告)日：2021-12-23

申请号：US17402635

申请日：2021-08-16

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Yu-Hua Chen

IPC: H01L23/498 ,  H01L21/48 ,  H05K1/18

Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.

公开(公告)号：US10999939B2

公开(公告)日：2021-05-04

申请号：US16535102

申请日：2019-08-08

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hsien Chien ,  Wen-Liang Yeh ,  Wei-Ti Lin

IPC: H05K7/10 ,  H05K7/12 ,  H05K3/46 ,  H05K1/11 ,  H05K3/40 ,  H05K3/00

Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.