公开(公告)号：TW200739744A

公开(公告)日：2007-10-16

申请号：TW095124834

申请日：2006-07-07

Applicant: ST微電子股份有限公司 STMICROELECTRONICS S.R.L.

Inventor： 紀瑟沛 阿瑞納 GIUSEPPE ARENA ,  卡提利納 杜納多 CATERINA DONATO ,  卡提諾 馬可 卡馬雷利 CATENO MARCO CAMALLERI ,  安傑洛 馬格利 ANGELO MAGRI'

IPC: H01L

CPC classification number: H01L29/7813 ,  H01L29/0623 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/511 ,  H01L29/66734

Abstract: 一種具有絕緣閘成型在槽中之半導體功率裝置之製造方法,一槽成型於一半導體本體內;該槽之槽壁及底部被第一絕緣材料層所覆蓋;該槽充滿了第二絕緣材料層;該第一,第二絕緣材料層經局部,同步及控制蝕刻如具有同樣蝕刻率之絕緣材料所蝕刻。一閘極氧化層,其具有小於第一絕緣材料層之厚度且沉澱於該槽之槽壁。一傳導性閘極區域,其成型於該槽內,本體區域及源極區域成型於該半導體本體內,並與該閘極區域相絕緣。因此,該閘極區域只延伸於第一,第二絕緣材料層其它部份之頂端。

Abstract in simplified Chinese: 一种具有绝缘闸成型在槽中之半导体功率设备之制造方法,一槽成型于一半导体本体内;该槽之槽壁及底部被第一绝缘材料层所覆盖;该槽充满了第二绝缘材料层;该第一,第二绝缘材料层经局部,同步及控制蚀刻如具有同样蚀刻率之绝缘材料所蚀刻。一闸极氧化层,其具有小于第一绝缘材料层之厚度且沉淀于该槽之槽壁。一传导性闸极区域,其成型于该槽内,本体区域及源极区域成型于该半导体本体内,并与该闸极区域相绝缘。因此,该闸极区域只延伸于第一,第二绝缘材料层其它部份之顶端。

公开(公告)号：TW200627747A

公开(公告)日：2006-08-01

申请号：TW094137406

申请日：2005-10-26

Applicant: 超微電子公司 STMICROELECTRONICS S.R.L.

Inventor： 安吉羅達瑞勾 D'ARRIGO, ANGELO ,  飛利普馬瑞諾 MARINO, FILIPPO

IPC: H02J

CPC classification number: H02J7/0072 ,  H02J7/0091

Abstract: 本發明係描述一種適合於充電一電池之裝置，該裝置包括至少一第一電晶體(M10)及一第二電晶體(M20)。該等電晶體(M10，M20)係連接至一輸入電壓(Vin)且具有輸出端；該第一電晶體(M10)之輸出端係連接至該電池(LOAD)。該裝置包括用於驅動該等電晶體(M10，M20)之一電路(100)，且該驅動電路(100)包括複數個第一裝置(CA1)，適合於在該電池(LOAD)之充電階段期間，調節該電池中之電流(Iout)。該等第一裝置(CA1)適合於在該電池(LOAD)之充電階段期間，使該等電晶體(M10，M20)輸出端上之電壓保持相等。

Abstract in simplified Chinese: 本发明系描述一种适合于充电一电池之设备，该设备包括至少一第一晶体管(M10)及一第二晶体管(M20)。该等晶体管(M10，M20)系连接至一输入电压(Vin)且具有输出端；该第一晶体管(M10)之输出端系连接至该电池(LOAD)。该设备包括用于驱动该等晶体管(M10，M20)之一电路(100)，且该驱动电路(100)包括复数个第一设备(CA1)，适合于在该电池(LOAD)之充电阶段期间，调节该电池中之电流(Iout)。该等第一设备(CA1)适合于在该电池(LOAD)之充电阶段期间，使该等晶体管(M10，M20)输出端上之电压保持相等。

公开(公告)号：WO2013064978A1

公开(公告)日：2013-05-10

申请号：PCT/IB2012/056021

申请日：2012-10-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： CAMPEDELLI, Roberto ,  PEZZUTO, Raffaella ,  LOSA, Stefano ,  MANTOVANI, Marco ,  AZPEITIA URQUIA, Mikel

IPC: B81B7/00 ,  B81B3/00

CPC classification number: B81B7/0006 ,  B81B3/0086 ,  B81B7/007 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/07 ,  B81B2207/097 ,  B81C1/00476 ,  H01L29/84

Abstract: A MEMS device (17) formed by a body (2); a cavity (25), extending above the body; mobile and fixed structures (18, 19) extending above the cavity and physically connected to the body via anchoring regions (16); and electrical-connection regions (10a, 10b, 10c), extending between the body (2) and the anchoring regions (16) and electrically connected to the mobile and fixed structures. The electrical-connection regions (10a, 10b, 10c) are formed by a conductive multilayer including a first semiconductor material layer (5), a composite layer (6) of a binary compound of the semiconductor material and of a transition metal, and a second semiconductor material layer (7).

Abstract translation: 由主体（2）形成的MEMS装置（17）; 在所述主体上方延伸的空腔（25）; 移动和固定结构（18,19），其延伸到空腔上方并经由锚定区域（16）物理连接到身体。 以及在主体（2）和锚固区域（16）之间延伸并且电连接到移动和固定结构的电连接区域（10a，10b，10c）。 电连接区域（10a，10b，10c）由包括第一半导体材料层（5），半导体材料的二元化合物和过渡金属的复合层（6）的导电性多层构成，以及 第二半导体材料层（7）。

公开(公告)号：WO2013007705A1

公开(公告)日：2013-01-17

申请号：PCT/EP2012/063442

申请日：2012-07-09

Applicant: STMICROELECTRONICS S.R.L. ,  ABAGNALE, Giovanni

Inventor： ABAGNALE, Giovanni

IPC: H01L29/417 ,  H01L21/74

CPC classification number: H01L21/743 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/872

Abstract: An electronic device includes a silicon substrate (2) having a first side and a second side. A structural layer of gallium nitride (6) is formed over the first side of the silicon substrate and includes an active area of the electronic device. A transition layer (8) is provided between the substrate and the structural layer. The transition layer electrically and/or thermally insulated the substrate and the structural layer from one another. A via hole (20) made of a conductive material extends through the structural layer and the transition layer. The via hole is electrically and/or thermally connected to the active area of the electronic device and to the substrate.

Abstract translation: 电子设备包括具有第一侧和第二侧的硅衬底（2）。 在硅衬底的第一侧上形成氮化镓（6）的结构层，并且包括电子器件的有源区。 在基板和结构层之间提供过渡层（8）。 过渡层将衬底和结构层彼此电和/或热绝缘。 由导电材料制成的通孔（20）延伸穿过结构层和过渡层。 通孔与电子器件的有源区域和衬底电气和/或热连接。

公开(公告)号：WO2012156034A1

公开(公告)日：2012-11-22

申请号：PCT/EP2012/001928

申请日：2012-05-04

Applicant: STMICROELECTRONICS S.R.L. ,  CREMA, Paolo

Inventor： CREMA, Paolo

IPC: H01L21/48 ,  B41C1/14

CPC classification number: H01L24/43 ,  H01L21/4821 ,  H01L2224/43 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: The present invention relates to a method and an apparatus for manufacturing lead frames. According to the present invention, a coating layer (120) is formed on one or more predefined portions (A, B, C, D, E, F, G, H) of the surface (110s) of the substrate (100) of the lead frame (100) by delimiting the predefined portions (A, B, C, D, E, F, G, H) by means of screen printing. The employment of screen printing allows the obtainment of large amounts of lead frames with excellent electronic and structural properties in a quick and cost-effective way.

Abstract translation: 本发明涉及一种用于制造引线框架的方法和装置。 根据本发明，在基板（100）的表面（110s）的一个或多个预定部分（A，B，C，D，E，F，G，H）上形成涂层（120） 通过丝网印刷限定预定部分（A，B，C，D，E，F，G，H）来引导框架（100）。 丝网印刷的使用允许以快速和成本有效的方式获得具有优异的电子和结构特性的大量引线框架。

公开(公告)号：WO2012089335A1

公开(公告)日：2012-07-05

申请号：PCT/EP2011/006556

申请日：2011-12-23

Applicant: STMICROELECTRONICS S.R.L. ,  RONCHI, Daniele ,  TERENZI, MARCO

Inventor： RONCHI, Daniele ,  TERENZI, MARCO

IPC: G01S15/89

CPC classification number: G01S15/8925 ,  G01S7/52023 ,  G01S15/8918 ,  G01S15/8927 ,  G01S15/8993

Abstract: 4D data ultrasound imaging system (100) comprising a matrix (10) of transducer elements (3) suitable for transmitting and for receiving ultrasound signals, said transducer elements (3) being divided into sub-matrixes (21) suitable for receiving in a delayed way a same acoustic signal, a plurality of reception channels (22) with one of said reception channels (22) being associated with one of said transducer elements (3), a beamformer device (109) comprising a plurality of storage cells (111) arranged in re-phasing matrixes (112), each re-phasing matrix (1 12) being associated with a corresponding sub-matrix (21) with each row (Ri) associated with one of said transducer elements (3), said storage cells (111) comprising an input storage stage (In) that is selectively associated with a row (Ri) and a reading output stage (Out) that is selectively associated with a buffer (16); each storage cell (111) that belongs to a same column (Coi) has the input stage (In) that is dynamically activated in sequential times with respect to another storage cell (11 1) of the same column (Coi) for storing the same delayed acoustic signal, said storage cells (1 11) that belong to the same column (Coi) have the output stage (Out) that is simultaneously activated.

Abstract translation: 4D数据超声成像系统（100）包括适于发送和接收超声信号的换能器元件（3）的矩阵（10），所述换能器元件（3）被分成适合于以延迟的方式接收的子矩阵（21） 一种相同的声信号，具有一个所述接收信道（22）的多个接收信道（22）与所述换能器元件（3）中的一个相关联，包括多个存储单元（111）的波束形成装置（109） 每个重定相矩阵（112）与相应的子矩阵（21）相关联，每个行（Ri）与所述换能器元件（3）中的一个相关联，所述存储单元 （111）包括选择性地与与缓冲器（16）相关联的行（Ri）和读取输出级（Out）相关联的输入存储级（In）; 属于相同列（Coi）的每个存储单元（111）具有相对于用于存储相同列（Coi）的另一存储单元（111）的连续时间动态地激活的输入级（In） 延迟声信号，属于同一列（Coi）的所述存储单元（11）具有同时被激活的输出级（Out）。

公开(公告)号：WO2011151269A2

公开(公告)日：2011-12-08

申请号：PCT/EP2011/058766

申请日：2011-05-27

Applicant: STMICROELECTRONICS S.R.L. ,  ADRAGNA, Claudio

Inventor： ADRAGNA, Claudio

IPC: H02M3/335 ,  H02M7/217

CPC classification number: H02M3/3353 ,  H02M3/33507 ,  H02M3/33523 ,  H02M7/2176 ,  H02M2001/0022

Abstract: An integrated circuit controls a switch of a switching current regulator. The current regulator comprises primary and secondary windings where a first and a second current flow, respectively. The switch is adapted to initiate or interrupt the circulation of the first current in the primary winding. The control integrated circuit comprises a comparator configured to compare a first signal representative of said first current to a second signal and a divider circuit configured to generate said second signal as a ratio of a third signal, proportional to a voltage on the primary winding, with a voltage on a capacitor. The capacitor is charged by a further current controlled by the third signal when the second current is different from zero and is discharged through resistor when the value of said second current is substantially zero.

Abstract translation: 集成电路控制开关电流调节器的开关。 电流调节器包括分别具有第一和第二电流的初级和次级绕组。 开关适于启动或中断初级绕组中的第一电流的循环。 所述控制集成电路包括：比较器，被配置为将表示所述第一电流的第一信号与第二信号进行比较;以及分频器电路，其被配置为产生所述第二信号，所述比较器与所述初级绕组上的电压成正比的第三信号与 电容上的电压。 当第二电流不同于零时，电容器被由第三信号控制的另外的电流充电，并且当所述第二电流的值基本上为零时，通过电阻放电。

公开(公告)号：WO2011138276A3

公开(公告)日：2011-11-10

申请号：PCT/EP2011/056956

申请日：2011-05-02

Applicant: STMICROELECTRONICS S.R.L. ,  SPINI, Claudio ,  ADRAGNA, Claudio

Inventor： SPINI, Claudio ,  ADRAGNA, Claudio

IPC: H02M3/335

Abstract: An integrated control circuit of a switch is described, which is adapted to open or close a current path; said integrated circuit includes a comparator to compare a first signal with a second signal representative of the current flowing through said current path. The comparator outputs a third variable signal between a low logic level and a high logic level according to whether said second signal is lower than said first signal or vice versa; the integrated circuit has a driver to generate a signal to drive said switch in response to the third signal, and is configured to detect a spike on the leading edge of said second signal and to blank said third signal for a first blanking time period which depends on a turn-on delay of said switch and a second blanking period which depends on the duration of said spike on the leading edge of said second signal.

公开(公告)号：WO2011079883A1

公开(公告)日：2011-07-07

申请号：PCT/EP2010/005932

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ROSSI, Sandro ,  RICOTTI, Giulio

Inventor： ROSSI, Sandro ,  RICOTTI, Giulio

IPC: H03K17/0416 ,  H03K17/16 ,  H03K17/74 ,  B06B1/02

CPC classification number: H03K17/74 ,  B06B1/0215 ,  H03K17/04163 ,  H03K17/161

Abstract: A transmission channel (1) is described of the type comprising at least one high voltage buffer block (4) comprising buffer transistors (MB1, MB2, MB3, MB4) and respective buffer diodes (DB1, DB2, DB3, DB4), being inserted between respective voltage references (HVPO, HVP1, HVMO, HVM1), these buffer transistors (MB1, MB2, MB3, MB4) being also connected to a clamping block (5), in turn comprising clamping transistors (MC1, MC2) connected to at least one output terminal (HVout) of this transmission channel through diodes (DC1, DC2) connected to prevent the body diodes of the clamping transistors (MC1, MC2) from conducting. Advantageously according to the invention, the transmission channel (1) comprises at least one reset circuit (20) comprising diodes (DME1, DME2, DME3, DME4) and being inserted between circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) of the high voltage buffer block (4) and of the clamping block (5), these circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) being in correspondence with conduction terminals of the transistors (MB l, MB2, MB3, MB4; MC1, MC2) comprised into the high voltage buffer block (4) and into the clamping block (5).

Abstract translation: 描述了包括至少一个包括缓冲晶体管（MB1，MB2，MB3，MB4）和相应的缓冲二极管（DB1，DB2，DB3，DB4）的高压缓冲块（4）的传输通道（1） 在相应的电压基准（HVPO，HVP1，HVMO，HVM1）之间，这些缓冲晶体管（MB1，MB2，MB3，MB4）也连接到钳位块（5），反过来又包括钳位晶体管（MC1，MC2） 所述传输通道的至少一个输出端子（HVout）通过连接的二极管（DC1，DC2），以防止钳位晶体管（MC1，MC2）的体二极管导通。 有利地，根据本发明，传输通道（1）包括至少一个包括二极管（DME1，DME2，DME3，DME4）的复位电路（20），并且插入在电路节点（XME1，XME2，XME3，XME4，XC1，XC2 ）和高压缓冲块（4）和钳位块（5）的这些电路节点（XME1，XME2，XME3，XME4，XC1，XC2）与晶体管（MB1，MB2， MB3，MB4; MC1，MC2）组成高压缓冲块（4）并进入夹紧块（5）。

公开(公告)号：WO2011076910A1

公开(公告)日：2011-06-30

申请号：PCT/EP2010/070608

申请日：2010-12-22

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS (MALTA) LTD ,  FORMOSA, Kevin ,  AZZOPARDI, Mark Anthony ,  CORTESE, Mario Francesco

Inventor： FORMOSA, Kevin ,  AZZOPARDI, Mark Anthony ,  CORTESE, Mario Francesco

IPC: H04R19/00 ,  B81B7/00

CPC classification number: H04R19/005 ,  B81B2201/0257 ,  B81B2207/012 ,  B81B2207/07 ,  B81B2207/093 ,  B81C1/0023 ,  B81C2203/019 ,  B81C2203/035 ,  B81C2203/0785 ,  B81C2203/0792 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/8592 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/16151 ,  H01L2924/3025 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A MEMS transducer (1) has a micromechanical sensing structure (10) and a package (46). The package (46) is provided with a substrate (45), carrying first electrical-connection elements (47), and with a lid (25), coupled to the substrate to define an internal cavity (24), in which the micromechanical sensing structure (10) is housed. The lid (25) is formed by: a cap layer (20) having a first surface (20a) and a second surface (20b), set opposite to one another, the first surface (20a) defining an external face of the package (46) and the second surface (20b) facing the substrate (45) inside the package (46); and a wall structure (21), set between the cap layer (20) and the substrate (45), and having a coupling face (21a) coupled to the substrate (45). At least a first electrical component (10, 11) is coupled to the second surface (20b) of the cap layer (20), inside the package (46), and the coupling face (21a) of the wall structure (21) carries second electrical-connection elements (30), electrically connected to the first electrical component (10, 11) and to the first electrical-connection elements (47).

Abstract translation: MEMS传感器（1）具有微机械感测结构（10）和封装（46）。 封装（46）设置有承载第一电连接元件（47）的衬底（45），以及耦合到衬底以限定内部空腔（24）的盖（25），其中微机械感测 结构（10）被容纳。 盖（25）由以下部分形成：盖层（20），具有彼此相对设置的第一表面（20a）和第二表面（20b），所述第一表面（20a）限定包装的外表面 46）和所述第二表面（20b）面对所述衬底（45）; 以及设置在所述盖层（20）和所述基板（45）之间并且具有联接到所述基板（45）的联接面（21a）的壁结构（21）。 至少第一电气部件（10,11）在封装（46）的内部联接到盖层（20）的第二表面（20b），并且壁结构（21）的联接面（21a）承载 电连接到第一电气部件（10,11）和第一电连接元件（47）的第二电连接元件（30）。