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公开(公告)号：US10756256B2
公开(公告)日：2020-08-25
申请号：US16411517
申请日：2019-05-14
Inventor： Meiyin Yang , Jun Luo , Tengzhi Yang , Jing Xu
Abstract: A magnetoresistive random access memory and a method for manufacturing the same are provided, with which a stress layer covers a part of the protective layer along a direction of a current in the spin-orbit coupling layer, so that a stress is generated on the part of the magnetic layer locally due to the stress layer, thus a lateral asymmetric structure is formed in a direction perpendicular to the current source. In a case that a current is supplied to the spin-orbit coupling layer, the spin-orbit coupling effect in the magnetic layer is asymmetric due to the stress on the part of the magnetic layer, thereby realizing a deterministic switching of the magnetic moment under the function of the stress.
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公开(公告)号：US20200219693A1
公开(公告)日：2020-07-09
申请号：US16648665
申请日：2019-02-25
IPC: H01J1/304
Abstract: A field emission cathode electron source and an array thereof provided by embodiments of the present disclosure include a substrate, and a cathode, a cathode tip and a gate disposed on the same side of the substrate. The cathode, the cathode tip and the gate are disposed on an upper surface of the substrate, and the cathode tip is connected to the cathode, and the gate is located on, a side of the cathode tip away from the cathode and an electron emission end of the cathode tip is directed toward a side of the substrate close to the gate. The cathode tips are arranged on the substrate in parallel with the substrate. Compared with the three dimensional stacked structure in the prior art, the present disclosure has a higher stability and reliability and is suitable for a large-scale integration.
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公开(公告)号：US20200152451A1
公开(公告)日：2020-05-14
申请号：US16287902
申请日：2019-02-27
Inventor： Xinyu LIU , Shengkai WANG , Yun BAI , Yidan TANG , Zhonglin HAN , Xiaoli TIAN , Hong CHEN , Chengyue YANG
Abstract: A method for oxidizing a silicon carbide based on microwave plasma at an AC voltage, including: step one, providing a silicon carbide substrate, and placing the silicon carbide substrate in a microwave plasma generating device; step two, introducing oxygen-containing gas to generate oxygen plasma at an AC voltage; step three, controlling movements of oxygen ions and electrons in the oxygen plasma by the AC voltage to generate an oxide layer having a predetermined thickness on the silicon carbide substrate, wherein when a voltage of the silicon carbide substrate is negative, the oxygen ions move close to an interface and perform an oxidation reaction with the silicon carbide, and when the voltage of the silicon carbide substrate is positive, the electrons move close to the interface and perform a reduction reaction with the silicon carbide, removing carbon residue; step four, stopping the introduction of oxygen-containing gas and the reaction completely.
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公开(公告)号：US20200027995A1
公开(公告)日：2020-01-23
申请号：US16586703
申请日：2019-09-27
Inventor： Huilong Zhu
IPC: H01L29/786 , H01L29/66 , H01L29/49 , H01L29/423 , H01L29/06 , B82Y10/00 , H01L29/10 , H01L29/775
Abstract: There are provided a nanometer semiconductor device with a high-quality epitaxial layer and a method of manufacturing the same. According to an embodiment, the semiconductor device may include: a substrate; at least one nanowire spaced apart from the substrate; at least one semiconductor layer, each formed around a periphery of respective one of the at least one nanowire to at least partially surround the corresponding nanowire, wherein the semiconductor layer(s) formed around the respective nanowire(s) are separated from each other; an isolation layer formed on the substrate, exposing the at least one semiconductor layer; and a gate stack formed on the isolation layer and intersecting the at least one semiconductor layer, wherein the gate stack includes a gate dielectric layer at least partially surrounding a periphery of respective one of the at least one semiconductor layer and a gate conductor layer.
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公开(公告)号：US20200027994A1
公开(公告)日：2020-01-23
申请号：US16586697
申请日：2019-09-27
Inventor： Huilong Zhu
IPC: H01L29/786 , H01L29/66 , H01L29/775 , H01L29/10 , B82Y10/00 , H01L29/06 , H01L29/423 , H01L29/49
Abstract: There are provided a nanometer semiconductor device with a high-quality epitaxial layer and a method of manufacturing the same. According to an embodiment, the semiconductor device may include: a substrate; at least one nanowire spaced apart from the substrate; at least one semiconductor layer, each formed around a periphery of respective one of the at least one nanowire to at least partially surround the corresponding nanowire, wherein the semiconductor layer(s) formed around the respective nanowire(s) are separated from each other; an isolation layer formed on the substrate, exposing the at least one semiconductor layer; and a gate stack formed on the isolation layer and intersecting the at least one semiconductor layer, wherein the gate stack includes a gate dielectric layer at least partially surrounding a periphery of respective one of the at least one semiconductor layer and a gate conductor layer.
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Patent Agency Ranking
公开(公告)号：US20190362945A1
公开(公告)日：2019-11-28
申请号：US16224435
申请日：2018-12-18
Inventor： Xinyu LIU , Yidan TANG , Shengkai WANG , Yun BAI , Chengyue YANG
Abstract: A microwave plasma generating device for plasma oxidation of SiC, comprising an outer cavity and a plurality of micro-hole/micro-nano-structured double-coupling resonant cavities disposed in the outer cavity. Each resonant cavity includes a cylindrical cavity. A micro-hole array formed by a plurality of micro-holes is uniformly distributed on a peripheral wall of the cylindrical cavity, a diameter of each of the micro-holes is an odd multiple of wavelength, and an inner wall of the cylindrical cavity has a metal micro-nano structure, the metal micro-nano structure has a periodic dimension of λ/n, where λ is wavelength of an incident wave, and n is refractive index of material of the resonant cavity. The outer cavity is provided with an gas inlet for conveying an oxygen-containing gas into the outer cavity, and the oxygen-containing gas forms an oxygen plasma around the resonant cavities for oxidizing SiC; a stage is disposed under the resonant cavities.
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公开(公告)号：US10373968B2
公开(公告)日：2019-08-06
申请号：US15306179
申请日：2014-07-10
Inventor： Zongliang Huo
IPC: H01L27/11556 , H01L29/10 , H01L29/788 , H01L27/11582 , H01L29/792
Abstract: A 3-D semiconductor device comprising a plurality of memory cells and a plurality of selection transistors, each of said plurality of memory cells comprises: a channel layer, distributed along a direction perpendicular to the substrate surface; a plurality of inter-layer insulating layers and a plurality of gate stack structures, alternately laminating along the sidewall of the channel layer; a plurality of floating gates, located between the plurality of inter-layer insulating layers and the sidewall of the channel layer; a plurality of drains, located at the top of the channel layer; and a plurality of sources, located in the said substrate between two adjacent memory cells of the said plurality of memory cells.
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238.发明申请公开(公告)号：US20190189523A1
公开(公告)日：2019-06-20
申请号：US16327973
申请日：2016-12-21
Inventor： Huilong ZHU , Huicai ZHONG , Yanbo ZHANG
IPC: H01L21/8238 , H01L27/092 , H01L29/66
Abstract: A semiconductor arrangement includes: a substrate; a plurality of fins formed on the substrate and extending in a first direction; a plurality of gate stacks formed on the substrate and extending in a second direction crossing the first direction and dummy gates composed of dielectric and extending in the second direction, wherein each of the gate stacks intersects at least one of the fins; and spacers formed on sidewalls of the gate stacks and sidewalls of the dummy gates, wherein spacers of at least a first one and a second one among the gate stacks and the dummy gates which are aligned in the second direction extend integrally, and at least some of the fins have ends abutting the dummy gates and substantially aligned with inner walls of corresponding ones of the spacers.
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公开(公告)号：US10312439B2
公开(公告)日：2019-06-04
申请号：US15546218
申请日：2015-05-14
Inventor： Qi Liu , Ming Liu , Haltao Sun , Hangbing Lv , Shibing Long , Writam Banerjee , Kangwei Zhang
IPC: H01L45/00
Abstract: A nonvolatile resistive switching memory includes an inert metal electrode, a resistive switching functional layer, and an easily oxidizable metal electrode. A graphene intercalation layer with nanopores, interposed between the easily oxidizable metal electrode and the resistive switching functional layer, is capable of controlling the metal ions, which are formed by the oxidation of the easily oxidizable metal electrode during the programming of the device, and only enter into the resistive switching functional layer through the position of the nanopores. Further, the graphene intercalation layer with nanopores is capable of blocking the diffusion of the metal ions, making the metal ions, which are formed after the oxidation of the easily oxidizable metal electrode, enter into the resistive switching functional layer only through the position of the nanopores during the programming of the device, thereby controlling the growing position of conductive filament.
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公开(公告)号：US20190157345A1
公开(公告)日：2019-05-23
申请号：US16177999
申请日：2018-11-01
Inventor： Huilong ZHU , Junjie Li , Chao Zhao
Abstract: A Magnetic Random Access Memory (MRAM), a method of manufacturing the same, and an electronic device including the same are provided. The MRAM includes a substrate, an array of memory cells arranged in rows and columns, bit lines, and word lines. The memory cells each include a vertical switch device and a magnetic tunnel junction on the switch device and electrically connected to a first terminal of the switch device. An active region of the switch device at least partially includes a single-crystalline semiconductor material. Each of the memory cell columns is disposed on a corresponding bit line, and a second terminal of each of the respective switch devices in the memory cell column is electrically connected to the corresponding bit line. Each of the word lines is electrically connected to a control terminal of the respective switch devices of the respective memory cells in a corresponding memory cell row.
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