公开(公告)号：US07229542B2

公开(公告)日：2007-06-12

申请号：US10434315

申请日：2003-05-07

Applicant: Christopher A. Bang

Inventor： Christopher A. Bang

IPC: B41C3/02 ,  C25D1/10 ,  B29C33/40 ,  B29C45/14 ,  B29B13/00

CPC classification number: G01P15/0802 ,  B33Y10/00 ,  B81B2201/042 ,  B81C99/0085 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/0197 ,  G01P15/125

Abstract: Molded structures, methods of and apparatus for producing the molded structures are provided. At least a portion of the surface features for the molds are formed from multilayer electrochemically fabricated structures (e.g. fabricated by the EFAB™ formation process), and typically contain features having resolutions within the 1 to 100 μm range. The layered structure is combined with other mold components, as necessary, and a molding material is injected into the mold and hardened. The layered structure is removed (e.g. by etching) along with any other mold components to yield the molded article. In some embodiments portions of the layered structure remain in the molded article and in other embodiments an additional molding material is added after a partial or complete removal of the layered structure.

Abstract translation: 提供了模制结构，制造模制结构的方法和设备。 用于模具的表面特征的至少一部分由多层电化学制造的结构（例如通过EFAB TM形成工艺制造）形成，并且通常包含具有在1至100μm范围内的分辨率的特征。 根据需要，将层状结构与其他模具部件组合，并将模塑材料注入模具中并硬化。 层压结构与任何其它模具部件一起被除去（例如通过蚀刻）以产生模塑制品。 在一些实施例中，分层结构的部分保留在模制品中，并且在其它实施例中，在部分或完全去除层状结构之后添加另外的模制材料。

公开(公告)号：US07172978B2

公开(公告)日：2007-02-06

申请号：US10895477

申请日：2004-07-21

Applicant: Hang Liao ,  Timothy Mellander ,  Mike Groh

Inventor： Hang Liao ,  Timothy Mellander ,  Mike Groh

IPC: H01L21/31 ,  H01L21/469

CPC classification number: B81C1/00801 ,  B81C2201/0197 ,  B81C2201/053 ,  B81C2201/056

Abstract: A method of depositing polymer thin films on a MEMS device having a wafer stack includes depositing one or more protection films on a polymer thin film layer on the wafer stack, fabricating the MEMS device, and removing the one or more protection films.

Abstract translation: 在具有晶片堆叠的MEMS器件上沉积聚合物薄膜的方法包括在晶片叠层上的聚合物薄膜层上沉积一个或多个保护膜，制造MEMS器件，以及去除一个或多个保护膜。

公开(公告)号：US20060057450A1

公开(公告)日：2006-03-16

申请号：US11119047

申请日：2005-04-28

Applicant: Jeffrey Morse ,  David Sopchak ,  Ravindra Upadhye ,  John Reynolds ,  Joe Satcher ,  Alex Gash

Inventor： Jeffrey Morse ,  David Sopchak ,  Ravindra Upadhye ,  John Reynolds ,  Joe Satcher ,  Alex Gash

IPC: H01M2/08 ,  H01M4/86 ,  H01M2/02 ,  H01M8/10

CPC classification number: H01M8/0618 ,  B01J19/0093 ,  B01J21/185 ,  B01J23/755 ,  B01J23/80 ,  B01J37/0203 ,  B01J37/0215 ,  B01J37/0242 ,  B01J37/036 ,  B01J2219/00783 ,  B01J2219/00822 ,  B01J2219/00824 ,  B01J2219/00828 ,  B01J2219/00831 ,  B01J2219/00835 ,  B01J2219/00873 ,  B81B3/0094 ,  B81B2201/051 ,  B81B2203/0338 ,  B81C2201/0197 ,  B82Y30/00 ,  C01B3/326 ,  C01B3/583 ,  C01B2203/0233 ,  C01B2203/044 ,  C01B2203/047 ,  C01B2203/1005 ,  H01M4/8825 ,  H01M4/9016 ,  H01M4/96 ,  H01M8/0204 ,  H01M8/0215 ,  H01M8/0228 ,  H01M8/0247 ,  H01M8/0625 ,  H01M8/0631 ,  H01M2250/30 ,  Y02B90/18 ,  Y02P20/52

Abstract: A microreactor comprising a silicon wafer, a multiplicity of microchannels in the silicon wafer, and a catalyst coating the microchannels. In one embodiment the catalyst coating the microchannels comprises a nanostructured material. In another embodiment the catalyst coating the microchannels comprises an aerogel. In another embodiment the catalyst coating the microchannels comprises a solgel. In another embodiment the catalyst coating the microchannels comprises carbon nanotubes.

Abstract translation: 一种微反应器，包括硅晶片，硅晶片中的多个微通道和涂覆微通道的催化剂。 在一个实施方案中，涂覆微通道的催化剂包括纳米结构材料。 在另一个实施方案中，涂覆微通道的催化剂包含气凝胶。 在另一个实施方案中，涂覆微通道的催化剂包括溶胶凝胶。 在另一个实施方案中，涂覆微通道的催化剂包括碳纳米管。

公开(公告)号：US20050181316A1

公开(公告)日：2005-08-18

申请号：US11028944

申请日：2005-01-03

Applicant: Uri Frodis ,  Adam Cohen ,  Michael Lockard

Inventor： Uri Frodis ,  Adam Cohen ,  Michael Lockard

IPC: B05D1/38 ,  C08K3/00 ,  C25D3/30 ,  C25D3/38 ,  C25D3/48 ,  C25D5/02 ,  C25D5/10 ,  C25D21/12 ,  H01L21/288 ,  H01L21/301 ,  H01L21/302 ,  H01L21/4763 ,  H01L21/768

CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

公开(公告)号：US20050072681A1

公开(公告)日：2005-04-07

申请号：US10841347

申请日：2004-05-07

Applicant: Adam Cohen ,  Michael Lockard ,  Dale McPherson

Inventor： Adam Cohen ,  Michael Lockard ,  Dale McPherson

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01P1/202 ,  H01P3/06 ,  H01P5/18 ,  H01P11/00 ,  H05K3/46 ,  C25D5/10

CPC classification number: H01P11/007 ,  B81B2201/042 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/0197 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01P15/0802 ,  G01P15/125 ,  H01P1/202 ,  H01P3/06 ,  H01P5/183 ,  H01P11/00 ,  H01P11/005 ,  H05K3/4647

Abstract: Multi-layer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching operations may be separated by intermediate post processing activities, they may be separated by cleaning operations, or barrier material removal operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.

Abstract translation: 多层结构由至少一种结构材料（例如镍）进行电化学制造，其被构造成限定期望的结构并且可以附着到基底上，并且由至少一种围绕期望的材料的牺牲材料（例如铜） 结构体。 在结构形成之后，通过多级蚀刻操作去除牺牲材料。 在一些实施例中，待移除的牺牲材料可以位于基底上或附加部件内的通道等内。 多级蚀刻操作可以通过中间后处理活动来分离，它们可以通过清洁操作或阻隔材料去除操作等分开。 障碍物可以通过与结构材料或基底接触而固定在适当的位置，或者它们可以通过牺牲材料单独固定在适当位置，并且因此在所有保留牺牲材料被蚀刻之后被自由地去除。

公开(公告)号：US20040065552A1

公开(公告)日：2004-04-08

申请号：US10677409

申请日：2003-10-01

Applicant: University of Southern California

Inventor： Adam L. Cohen

IPC: C25D005/02

CPC classification number: C25D5/10 ,  B33Y10/00 ,  B33Y70/00 ,  B81C1/00126 ,  B81C2201/0181 ,  B81C2201/0197 ,  B81C2201/032 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/12 ,  C25D5/22 ,  C25D17/06 ,  H01L21/2885 ,  H05K3/241 ,  Y10T428/12486 ,  Y10T428/239

Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

公开(公告)号：US20020132387A1

公开(公告)日：2002-09-19

申请号：US10151744

申请日：2002-05-20

Applicant: Memscap

Inventor： Catherine Charrier ,  Eric Bouchon ,  Alain Campo ,  Guy Imbert ,  Francois Valentin ,  Laurent Basteres

IPC: H01L021/00

CPC classification number: B81C1/00158 ,  B81B3/007 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2203/0307 ,  B81B2203/033 ,  B81C2201/0109 ,  B81C2201/0197 ,  H01G5/16 ,  H01H1/0036

Abstract: Process for fabricating electronic components, of the variable capacitor or microswitch type, comprising a fixed plate (1) and a deformable membrane (20) which are located opposite each other, which comprises the following steps, consisting in: depositing a first metal layer on an oxide layer (2), said first metal layer being intended to form the fixed plate; depositing a metal ribbon (10, 11) on at least part of the periphery and on each side of the fixed plate (1), said ribbon being intended to serve as a spacer between the fixed plate (1) and the deformable membrane (20); depositing a sacrificial resin layer (15) over at least the area of said fixed plate (1); generating, by lithography, a plurality of wells in the surface of said sacrificial resin layer; depositing, by electrolysis, inside the wells formed in the sacrificial resin (15), at least one metal region intended to form the deformable membrane (20), this metal region extending between sections of the metal ribbon (10, 11) which are located on each side of said fixed plate (1); removing the sacrificial resin layer (15).

Abstract translation: 用于制造可变电容器或微型开关类型的电子部件的方法包括彼此相对定位的固定板（1）和可变形膜（20），其包括以下步骤：将第一金属层沉积在 氧化物层（2），所述第一金属层旨在形成所述固定板; 在固定板（1）的周边的至少一部分和每一侧上沉积金属带（10,11），所述带旨在用作固定板（1）和可变形膜（20）之间的间隔件 ）; 在所述固定板（1）的至少所述区域上沉积牺牲树脂层（15）; 通过光刻产生在所述牺牲树脂层的表面中的多个孔; 通过电解在形成在牺牲树脂（15）中的阱内沉积旨在形成可变形膜（20）的至少一个金属区域，该金属区域在位于金属带（10,11）的部分之间延伸 在所述固定板（1）的每一侧上; 去除牺牲树脂层（15）。

公开(公告)号：US06444488B2

公开(公告)日：2002-09-03

申请号：US09858092

申请日：2001-05-15

Applicant: Catherine Charrier ,  Eric Bouchon ,  Alain Campo ,  Guy Imbert ,  François Valentin ,  Laurent Basteres

Inventor： Catherine Charrier ,  Eric Bouchon ,  Alain Campo ,  Guy Imbert ,  François Valentin ,  Laurent Basteres

IPC: H01L2100

CPC classification number: B81C1/00158 ,  B81B3/007 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2203/0307 ,  B81B2203/033 ,  B81C2201/0109 ,  B81C2201/0197 ,  H01G5/16 ,  H01H1/0036

Abstract: Process for fabricating electronic components, of the variable capacitor or microswitch type, comprising a fixed plate (1) and a deformable membrane (20) which are located opposite each other, which comprises the following steps, consisting in: depositing a first metal layer on an oxide layer (2), said first metal layer being intended to form the fixed plate; depositing a metal ribbon (10, 11) on at least part of the periphery and on each side of the fixed plate (1), said ribbon being intended to serve as a spacer between the fixed plate (1) and the deformable membrane (20); depositing a sacrificial resin layer (15) over at least the area of said fixed plate (1); generating, by lithography, a plurality of wells in the surface of said sacrificial resin layer; depositing, by electrolysis, inside the wells formed in the sacrificial resin (15), at least one metal region intended to form the deformable membrane (20), this metal region extending between sections of the metal ribbon (10, 11) which are located on each side of said fixed plate (1); removing the sacrificial resin layer (15).

Abstract translation: 用于制造可变电容器或微型开关类型的电子部件的方法包括彼此相对定位的固定板（1）和可变形膜（20），其包括以下步骤：将第一金属层沉积在 氧化物层（2），所述第一金属层旨在形成所述固定板;在所述固定板（1）的周边的至少一部分和所述固定板（1）的每一侧上沉积金属带（10,11），所述带是 旨在用作固定板（1）和可变形膜（20）之间的间隔件;在至少所述固定板（1）的区域上沉积牺牲树脂层（15）;通过光刻产生多个 在所述牺牲树脂层的表面中的孔;通过电解在形成在牺牲树脂（15）中的阱内部，至少一个旨在形成可变形膜（20）的金属区域沉积，该金属区域在 金属带（10,11） 位于所述固定板（1）的每一侧上;去除所述牺牲树脂层（15）。

公开(公告)号：TWI575672B

公开(公告)日：2017-03-21

申请号：TW103127488

申请日：2014-08-11

Applicant: 精材科技股份有限公司 ,  XINTEC INC.

Inventor： 林建名 ,  LIN, CHIENMIN ,  黃郁庭 ,  HUANG, YUTING ,  傅振寧 ,  FU, CHENNING ,  何彥仕 ,  HO, YENSHIH

IPC: H01L23/12 ,  H01L23/488

CPC classification number: B81B7/007 ,  B81C1/00182 ,  B81C1/00269 ,  B81C2201/0197 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：TW201109267A

公开(公告)日：2011-03-16

申请号：TW098130194

申请日：2009-09-08

Applicant: 黃榮堂

Inventor： 黃榮堂 ,  林銘哲 ,  許后竣

IPC: B81C ,  H01L

CPC classification number: B81B3/0086 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2207/015 ,  B81C2201/0167 ,  B81C2201/0197 ,  B81C2203/0714

Abstract: 本發明係一種對CMOS-MEMS微加工元件結構强化及靈敏度提升之方法,其中CMOS-MEMS微加工元件可為微動作感測器、微致動器以及微射頻開關,其係包括有下列之步驟:於一微加工元件中利用鈍化層與金屬層製作所需的化學鍍金屬結構區域;透過微影製程製作化學鍍金屬結構之模穴;化學鍍沈積金屬結構於微加工元件結構上;研磨金屬結構,達到厚度與均勻度控制;利用乾、溼蝕刻技術使微加工元件結構懸浮。本發明利用化學鍍在微結構上沈積一金屬結構,達到增强懸浮結構强度與提供多一層保護,藉以改善微加工元件於運動或封裝中結構容易斷裂之問題,得到尺寸小且結構强之CMOS-MEMS微加工元件。此外對於微動作感測器晶片如加速度計、陀螺儀等,也可藉由化學鍍沈積一金屬結構於感測器結構上,藉此增加質量塊重量、增加感測面積,提升靈敏度、提升電容値、縮小結構面積以及降低懸浮結構本身因殘留應力所造成的翹曲程度。

Abstract in simplified Chinese: 本发明系一种对CMOS-MEMS微加工组件结构强化及灵敏度提升之方法,其中CMOS-MEMS微加工组件可为微动作传感器、微致动器以及微射频开关,其系包括有下列之步骤:于一微加工组件中利用钝化层与金属层制作所需的化学镀金属结构区域;透过微影制程制作化学镀金属结构之模穴;化学镀沉积金属结构于微加工组件结构上;研磨金属结构,达到厚度与均匀度控制;利用干、湿蚀刻技术使微加工组件结构悬浮。本发明利用化学镀在微结构上沉积一金属结构,达到增强悬浮结构强度与提供多一层保护,借以改善微加工组件于运动或封装中结构容易断裂之问题,得到尺寸小且结构强之CMOS-MEMS微加工组件。此外对于微动作传感器芯片如加速度计、陀螺仪等,也可借由化学镀沉积一金属结构于传感器结构上,借此增加质量块重量、增加传感面积,提升灵敏度、提升电容値、缩小结构面积以及降低悬浮结构本身因残留应力所造成的翘曲程度。