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    High frequency power amplifier and wireless communication system
    23.
    发明授权
    High frequency power amplifier and wireless communication system 有权
    RF功率放大器和无线通信系统

    公开(公告)号：EP1411632B1

    公开(公告)日：2008-03-26

    申请号：EP03023106.2

    申请日：2003-10-10

    Applicant: Renesas Technology Corp. ,  Hitachi ULSI Systems Co.,Ltd. ,  Hitachi Hybrid network Co., Ltd.

    Inventor： Takahashi, Kyoichi, Hitachi ULSI Systems Co. Ltd. ,  Matsudaira, Nobuhiro ,  Akamine, Hitoshi

    IPC: H03G3/30

    CPC classification number: H03G3/3047 ,  H03F2200/504

    Abstract: The present invention provides a high frequency amplifier suitable for use in a wireless communication system which performs detection of an output level necessary for feedback control by a current detection system, wherein control sensitivity in an area low in transmit request level is lowered so that an output level can be controlled over the whole control range with satisfactory accuracy. There is provided a high frequency power amplification electric part constituting a wireless communication system, which performs detection of an output level necessary for feedback control of output power by a current detection system, compares the output level detected signal and an output level designation signal and generates a bias voltage for a high frequency power amplifier according to the difference therebetween to thereby control gain, wherein an nth root converter or a logarithm converter is provided between a current detector and a current-voltage converter.

    Floating-gate memory cell with an auxiliary gate
    24.
    发明公开
    Floating-gate memory cell with an auxiliary gate 审中-公开
    Schwebegatter-Speicherzelle mit einem Hilfsgatter

    公开(公告)号：EP1814148A2

    公开(公告)日：2007-08-01

    申请号：EP06026443.9

    申请日：2006-12-20

    Applicant: Renesas Technology Corp.

    Inventor： Osabe, Taro, c/o Hitachi Ltd. ,  Ishigaki, Takashi, c/o Hitachi Ltd. ,  Sasago, Yoshitaka, c/o Hitachi Ltd.

    IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  G11C16/04 ,  H01L29/423

    CPC classification number: H01L21/28273 ,  G11C11/16 ,  G11C16/0483 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11553 ,  H01L29/66825 ,  H01L29/7881 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A plurality of floating gates (7) are formed on a principal surface of a semiconductor substrate (1) that constitutes a nonvolatile semiconductor memory device through a first gate dielectric film (4). An auxiliary gate (9) formed on the principal surface of the semiconductor substrate through a third gate dielectric film (6) is formed on one adjacent side of the floating gates (7). A groove is formed on the other adjacent side of the floating gate, and an n-type diffusion layer (3) is formed on a bottom side of the groove. A data line of the nonvolatile semiconductor memory device is constituted by an inversion layer formed on the principal surface of the semiconductor substrate to be opposed to an auxiliary gate by applying desired voltage to the auxiliary gate, and the n-type diffusion layer.

    Abstract translation: 多个浮置栅极（7）通过第一栅极电介质膜（4）形成在构成非易失性半导体存储器件的半导体衬底（1）的主表面上。 通过第三栅极电介质膜（6）形成在半导体衬底的主表面上的辅助栅极（9）形成在浮动栅极（7）的一个相邻侧上。 在浮置栅极的另一个相邻侧上形成有沟槽，并且在槽的底侧形成有n型扩散层（3）。 非易失性半导体存储器件的数据线由通过向辅助栅极和n型扩散层施加期望的电压而形成在半导体衬底的主表面上以与辅助栅极相对的反型层构成。

    Film forming apparatus and method
    29.
    发明公开
    Film forming apparatus and method 审中-公开
    Vorrichtung und Verfahren zur Erzeugung vonDünnschichten

    公开(公告)号：EP1593755A1

    公开(公告)日：2005-11-09

    申请号：EP05000822.6

    申请日：2005-01-17

    Applicant: Renesas Technology Corp.

    Inventor： Kawahara, Takaaki ,  Torii, Kazuyoshi

    IPC: C23C16/455

    CPC classification number: C23C16/45544 ,  C23C16/45514 ,  C23C16/45531 ,  C23C16/45561 ,  C30B25/14

    Abstract: An atomic layer deposition (ALD) apparatus capable of forming a conformal ultrathin-film layer with enhanced step coverage is disclosed. The apparatus includes an ALD reactor (101) supporting therein a wafer (102), and a main pipe (105) coupled thereto for constant supply of a carrier gas. This pipe (105) has two parallel branch pipes (105a-105b). Raw material sources (106a-106c) are connected by three-way valves (108a-108c) to one branch pipe (105a) through separate pipes (107a-107c), respectively. Similarly, oxidant/reducer sources (109a-109c) are coupled by three-way valves (111a-111c) to the other branch pipe (105b) via independent pipes (110a-110c). ALD works by introducing one reactant gas at a time into the reactor (101) while being combined with the carrier gas. The gas is "chemisorped" onto the wafer surface, creating a monolayer deposited. During the supply of a presently selected material gas from its source (106a) to a corresponding branch pipe (105a), this gas passes through its own pipe (107a) independently of the others. An ALD method is also disclosed.

    Abstract translation: 公开了能够形成具有增强的阶梯覆盖层的保形超薄膜层的原子层沉积（ALD）装置。 该装置包括支撑晶片（102）的ALD反应器（101）和与其连接的主管（105），以恒定地供应载气。 该管道（105）具有两个平行的支管（105a-105b）。 原料源（106a-106c）分别通过分开的管道（107a-107c）通过三通阀（108a-108c）连接到一个支管（105a）。 类似地，氧化剂/还原剂源（109a-109c）通过独立管（110a-110c）通过三通阀（111a-111c）连接到另一分支管（105b）。 ALD通过在与载气组合的同时将一个反应气体一次引入反应器（101）中。 气体被“化学吸附”到晶片表面上，形成单层沉积。 在从其源（106a）向相应的分支管（105a）供应当前选择的原料气体时，该气体独立于其它管道（107a）通过其自身的管道（107a）。 还公开了一种ALD方法。

    Radio communication semiconductor integrated circuit, data processing semiconductor integrated circuit and portable device
    30.
    发明公开
    Radio communication semiconductor integrated circuit, data processing semiconductor integrated circuit and portable device 审中-公开
    用于无线电通信，进行数据处理和便携设备的半导体集成电路的集成半导体电路

    公开(公告)号：EP1528694A1

    公开(公告)日：2005-05-04

    申请号：EP04256111.8

    申请日：2004-10-01

    Applicant: Renesas Technology Corp.

    Inventor： Nakagawa, Tetsuya, c/o Renesas Technology Corp. ,  Kunori, Masafumi, c/o Renesas Technology Corp.

    IPC: H04B7/26 ,  H04B1/38 ,  H03M7/30

    CPC classification number: H03J7/02

    Abstract: A portable device having a communication function composed of a plurality of LSIs operated in synchronization with a clock, such as a baseband LSI and a logic LSI such as an application processor, can synchronize the baseband LSI with the logic LSI without lowering the performance of the logic LSI.
    In a portable device having a communication function composed of a plurality of LSIs operated in synchronization with different clocks of a baseband LSI performing processing of modulating transmitted data and demodulating received data and an application processor performing processing of compressing transmitted data and decompressing received data, the baseband LSI has a function of detecting a frequency drift of the clock signal based on time information for synchronization included in received data and a terminal or an interface for outputting a signal including its own time information to the outside, the application processor has a terminal or an interface for inputting a signal including time information from the outside, and the signal including time information is fed from the baseband LSI to the application processor.

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