公开(公告)号：DE102004020575B3

公开(公告)日：2005-08-25

申请号：DE102004020575

申请日：2004-04-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAPP THOMAS ,  SYMANCZYK RALF

IPC: G11C11/00 ,  G11C13/02 ,  G11C16/02 ,  H01L27/24

Abstract: Parallel bit lines (1) of the programmable metallization memory cells lie at right angles to parallel word lines (2). Memory cells are located at the crossing points between the lines. Each memory zone (3) so defined, contains a chalcogenide glass presenting a pn junction to the bit line. Between the memory zone and the word line an electrode (4) forms a metallization memory cell.

公开(公告)号：DE102004053602A1

公开(公告)日：2005-06-30

申请号：DE102004053602

申请日：2004-11-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAPP THOMAS ,  KUND MICHAEL ,  SYMANCZYK RALF

IPC: G06F13/16 ,  G06F13/28 ,  G11C7/00 ,  G11C7/10 ,  G11C16/00

Abstract: According to the invention, a memory system, and a process for controlling a memory component, to achieve different kinds of memory characteristics on one and the same memory component, is provided, the process comprising the steps: Sending out a signal to select one of several possible modes for the memory component; and Operating the memory component in accordance with the specific mode selected by the signal.

公开(公告)号：DE102006008491B4

公开(公告)日：2008-09-11

申请号：DE102006008491

申请日：2006-02-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  PINNOW CAY-UWE

IPC: G11C13/04 ,  G11C11/42

公开(公告)号：DE102006011461A1

公开(公告)日：2007-09-27

申请号：DE102006011461

申请日：2006-03-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF

IPC: H01L27/24

Abstract: The structure (1) has a solid electrolyte layer (3) partially covered with an electrode layer (2). The solid electrolyte layer is located on another electrode layer (4). The layer (4) is located on a substrate (6) e.g. semiconductor wafer. A layer area (7) is arranged at a boundary surface area of the solid electrolyte layer and the electrode layer. The layer area exhibits an oxygen concentration higher than that of solid electrolyte layer and the electrode layer. Independent claims are also included for the following: (1) a method for manufacturing an electrical structure (2) a method for manufacturing a memory.

公开(公告)号：DE102004053602B4

公开(公告)日：2007-02-22

申请号：DE102004053602

申请日：2004-11-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAPP THOMAS ,  KUND MICHAEL ,  SYMANCZYK RALF

IPC: G11C16/02 ,  G06F13/16 ,  G06F13/28 ,  G11C7/00 ,  G11C7/10 ,  G11C16/00

Abstract: According to the invention, a memory system, and a process for controlling a memory component, to achieve different kinds of memory characteristics on one and the same memory component, is provided, the process comprising the steps: Sending out a signal to select one of several possible modes for the memory component; and Operating the memory component in accordance with the specific mode selected by the signal.

公开(公告)号：DE102004041893B4

公开(公告)日：2006-11-23

申请号：DE102004041893

申请日：2004-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  PINNOW CAY-UWE ,  HAPP THOMAS

IPC: H01L21/822 ,  H01L27/24

公开(公告)号：DE102005004434A1

公开(公告)日：2006-08-10

申请号：DE102005004434

申请日：2005-01-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PINNOW CAY-UWE ,  SYMANCZYK RALF

IPC: G11C13/00

Abstract: Device (100) has two electrode units between which an electrolyte film is arranged and contacted. A conduction path is formed between the electrode units over the electrolyte film by line segments diffused from one of the electrode units into the electrolyte layer. A heating device (400) heats the device during switching operation and is made of a solid state electrolyte material. Independent claims are also included for: (a) a switching method for controlling a solid electrolyte cell (b) a memory cell array including an array of switching units.

公开(公告)号：DE102004041893A1

公开(公告)日：2006-03-02

申请号：DE102004041893

申请日：2004-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  PINNOW CAY-UWE ,  HAPP THOMAS

IPC: H01L21/822 ,  H01L27/24

公开(公告)号：DE102004005248A1

公开(公告)日：2005-09-15

申请号：DE102004005248

申请日：2004-01-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DEHM CHRISTINE ,  HALIK MARCUS ,  KLAUK HAGEN ,  ZSCHIESCHANG UTE ,  SCHMID GUENTER ,  SYMANCZYK RALF

IPC: A61B5/01 ,  G01K7/01 ,  H01L51/20

Abstract: The device has an organic field effect transistor (10) that is formed by arranging an organic semiconductor layer (24) over source, drain and gate dielectric layers and a gate electrode. The transistor is utilized to collect a temperature dependant electrical parameter, where drain-source-voltage of the transistor is used as a measured temperature value. A threshold voltage of the transistor is dependent on temperature over a wide area. An independent claim is also included for use of a temperature sensor device in a measuring device for measuring body temperature of a living being e.g. human being.

公开(公告)号：DE102004010243A1

公开(公告)日：2005-05-19

申请号：DE102004010243

申请日：2004-03-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  PINNOW CAY-UWE ,  KUND MICHAEL

IPC: G11C13/02 ,  G11C16/02 ,  H01L27/24 ,  G11C7/24 ,  G11C11/34 ,  G11C16/06 ,  G11C16/30 ,  H01L27/10 ,  H01L45/00

Abstract: The cell includes a PMC resistance component (1) comprising solid electrolyte material, and assuming a low resistance or a high resistance state, depending on the applied electric field during a write process. A current limiting circuit limits the current flowing through the PMC resistance component when changing the resistance from the high-resistance state to the low-resistance state. Independent claims are included for a memory cell device, and for a method of setting the state in a memory cell.