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公开(公告)号:AU4760101A
公开(公告)日:2001-10-15
申请号:AU4760101
申请日:2001-03-21
Applicant: INTEL CORP
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公开(公告)号:DE10196005B4
公开(公告)日:2011-01-05
申请号:DE10196005
申请日:2001-03-23
Applicant: INTEL CORP
Inventor: ELLISON CARL M , GOLLIVER ROGER A , HERBERT HOWARD C , LIN DERRICK C , MCKEEN FRANCIS X , NEIGER GILBERT , RENERIS KEN , SUTTON JAMES A , THAKKAR SHREEKANT S , MITTAL MILLIND
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公开(公告)号:DE112007003206T5
公开(公告)日:2009-12-24
申请号:DE112007003206
申请日:2007-11-30
Applicant: INTEL CORP
Inventor: DATTA SHAM M , KUMAR MOHAN J , SUTTON JAMES A , BRICKELL ERNIE , SCHOINAS IOANNIS T
Abstract: Apparatuses, methods, and systems for reconfiguring a secure system are disclosed. In one embodiment, an apparatus includes a configuration storage location, a lock, and lock override logic. The configuration storage location is to store information to configure the apparatus. The lock is to prevent writes to the configuration storage location. The lock override logic is to allow instructions executed from sub-operating mode code to override the lock.
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公开(公告)号:DE10196006B4
公开(公告)日:2008-07-24
申请号:DE10196006
申请日:2001-03-14
Applicant: INTEL CORP
Inventor: ELLISON CARL M , GOLLIVER ROGER A , HERBERT HOWARD C , LIN DERRICK C , MCKEEN FRANCIS X , NEIGER GILBERT , RENERIS KEN , SUTTON JAMES A , THAKKAR SHREEKANT S , MITTAL MILLIND
Abstract: The present invention is a method, apparatus, and system to generate a key hierarchy for use in an isolated execution environment of a protected platform. In order to bind secrets to particular code operating in isolated execution, a key hierarchy comprising a series of symmetric keys for a standard symmetric cipher is utilized. The protected platform includes a processor that is configured in one of a normal execution mode and an isolated execution mode. A key storage stores an initial key that is unique for the platform. A cipher key creator located in the protected platform creates the hierarchy of keys based upon the initial key. The cipher key creator creates a series of symmetric cipher keys to protect the secrets of loaded software code.
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公开(公告)号:GB2414823B
公开(公告)日:2007-04-11
申请号:GB0421213
申请日:2004-09-23
Applicant: INTEL CORP
Inventor: WILSON JOHN H , SCHOINAS IOANNIS T , YOUSIF MAZIN S , RANKIN LINDA J , GRAWROCK DAVID W , GREINER ROBERT J , SUTTON JAMES A , VAID KUSHAGRA , WISEMAN WILLARD M
IPC: G06F1/00 , G06F21/24 , G06F9/445 , G06F9/46 , G06F12/14 , G06F15/163 , G06F15/177 , H04L9/00
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公开(公告)号:GB2405974B
公开(公告)日:2005-04-27
申请号:GB0426493
申请日:2001-03-21
Applicant: INTEL CORP
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公开(公告)号:GB2405973B
公开(公告)日:2005-04-27
申请号:GB0426491
申请日:2001-03-21
Applicant: INTEL CORP
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公开(公告)号:GB2405973A
公开(公告)日:2005-03-16
申请号:GB0426491
申请日:2001-03-21
Applicant: INTEL CORP
Inventor: HERBERT HOWARD , GRAWROCK DAVID W , ELLISON CARL M , GOLLIVER ROGER A , LIN DERRICK C , MCKEEN FRANCIS X , RENERIS KEN , SUTTON JAMES A , THAKKAR SHREEKANT S , MITTAL MILLIND , NEIGER GILBERT
Abstract: A method of remote attestation for a special mode of operation comprises storing an audit log within protected memory of a platform. The audit log is a listing of data representing each of a plurality of Iso X software modules loaded into the platform. The audit log is retrieved from the protected memory in response to receiving a remote attestation request from a remotely located platform. Then, the retrieved audit log is digitally signed to produce a digital signature for transfer to the remotely located platform.
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公开(公告)号:GB2377794B
公开(公告)日:2005-02-16
申请号:GB0225050
申请日:2001-03-21
Applicant: INTEL CORP
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公开(公告)号:DE10196005T1
公开(公告)日:2003-03-13
申请号:DE10196005
申请日:2001-03-23
Applicant: INTEL CORP
Inventor: ELLISON CARL M , GOLLIVER ROGER A , HERBERT HOWARD C , LIN DERRICK C , MCKEEN FRANCIS X , NEIGER GILBERT , RENERIS KEN , SUTTON JAMES A , THAKKAR SHREEKANT S , MITTAL MILLIND
Abstract: A technique is provided to execute isolated instructions according to an embodiment of the present invention. An execution unit executes an isolated instruction in a processor operating in a platform. The processor is configured in one of a normal execution mode and an isolated execution mode. A parameter storage containing at least one parameter to support execution of the isolated instruction when the processor is configured in the isolated execution mode.
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