公开(公告)号：KR20200140395A

公开(公告)日：2020-12-15

申请号：KR20207034869

申请日：2016-12-31

Applicant: INTEL CORP

Inventor： SANKARAN RAJESH M ,  NEIGER GILBERT ,  RANGANATHAN NARAYAN ,  VAN DOREN STEPHEN R ,  NUZMAN JOSEPH ,  MCDONNELL NIALL D ,  O'HANLON MICHAEL A ,  MOSUR LOKPRAVEEN B ,  DRYSDALE TRACY GARRETT ,  NURVITADHI ERIKO ,  MISHRA ASIT K ,  VENKATESH GANESH ,  MARR DEBORAH T ,  CARTER NICHOLAS P ,  PEARCE JONATHAN D ,  GROCHOWSKI EDWARD T ,  GRECO RICHARD J ,  VALENTINE ROBERT ,  CORBAL JESUS ,  FLETCHER THOMAS D ,  BRADFORD DENNIS R ,  MANLEY DWIGHT P ,  CHARNEY MARK J ,  COOK JEFFREY J ,  CAPRIOLI PAUL ,  YAMADA KOICHI ,  GLOSSOP KENT D ,  SHEFFIELD DAVID B

IPC: G06F9/48 ,  G06F9/38

Abstract: 이종컴퓨팅을위한시스템들, 방법들, 및장치들의실시예들이설명된다. 일부실시예들에서, 하드웨어이종스케줄러는복수의이종처리요소들중 하나이상의이종처리요소상에서의실행을위해명령어들을디스패치하고, 명령어들은복수의이종처리요소들중 하나이상의이종처리요소에의해처리될코드조각에대응하고, 명령어들은복수의이종처리요소들중 하나이상의이종처리요소중의적어도하나의이종처리요소에대한고유명령어들이다.

公开(公告)号：JP2013214325A

公开(公告)日：2013-10-17

申请号：JP2013146594

申请日：2013-07-12

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BENNETT STEVEN ,  NEIGER GILBERT ,  COTA-ROBLES ERIK ,  JEYASINGH STALINSELVARAJ ,  KAGI ARAN ,  MICHAEL KOZUCH ,  RICHARD UHLIG

IPC: G06F9/46 ,  G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/4557

Abstract: PROBLEM TO BE SOLVED: To manage a machine state in virtual machine operations.SOLUTION: Methods and systems are provided to control a transition between a virtual machine (VM) and a virtual machine monitor (VMM). A processor uses state action indicators to load and/or store associated elements of a machine state before completing the transition. The state action indicators may be stored in a virtual machine control structure (VMCS), predetermined, and/or calculated dynamically. In some embodiments, the values loaded can be directly acquired from the VMCS, predetermined and/or calculated dynamically. In some embodiments, the values stored may be acquired directly from the machine state, predetermined and/or calculated dynamically.

Abstract translation: 要解决的问题：在虚拟机操作中管理机器状态。解决方案：提供了方法和系统来控制虚拟机（VM）和虚拟机监视器（VMM）之间的转换。 在完成转换之前，处理器使用状态动作指示器加载和/或存储机器状态的相关元素。 状态动作指示符可以存储在虚拟机控制结构（VMCS）中，预定的和/或动态地计算。 在一些实施例中，可以从VMCS直接获取加载的值，预先确定和/或动态地计算。 在一些实施例中，存储的值可以直接从机器状态获取，预定和/或动态地计算。

公开(公告)号：JP2011081790A

公开(公告)日：2011-04-21

申请号：JP2010213238

申请日：2010-09-24

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： PATEL BAIJU V ,  GOPALAKRISHNA RAJEEV ,  GLEW ANDREW F ,  KUSHLIS ROBERT J ,  VAN DYKE DON ALAN ,  CIHULA JOSEPH FRANK ,  MALLICK ASIT K ,  CROSSLAND JAMES B ,  NEIGER GILBERT ,  RODGERS SCOTT DION ,  DIXON MARTIN GUY ,  CHARNEY MARK JAY ,  GOTTLIEB JOCOB

IPC: G06F9/34

CPC classification number: G06F9/3013 ,  G06F9/30105 ,  G06F9/30112 ,  G06F9/32 ,  G06F9/342 ,  G06F9/35 ,  G06F12/1441

Abstract: PROBLEM TO BE SOLVED: To allow lower and upper bounds of an object pointed to by a pointer to be automatically checked during execution of a program in programming languages such as C and C++ programs. SOLUTION: A processor 200 has default registers 202 and bound registers 204 which represent hardware register extensions of the default registers. The bound registers 204 maintain the association of metadata with its corresponding data. By providing the association between the default registers 202 and the bound registers 204, the calling convention of these registers 202 remains the same. The metadata being held at the bound registers 204 may be used to specify a range of memory addresses which can be accessed (loaded/stored) using the processor 200. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：允许在编程语言（如C和C ++程序）中执行程序期间自动检查由指针指向的对象的下限和上限。 解决方案：处理器200具有表示默认寄存器的硬件寄存器扩展的默认寄存器202和绑定寄存器204。 绑定寄存器204保持元数据与其相应数据的关联。 通过提供默认寄存器202和绑定寄存器204之间的关联，这些寄存器202的调用约定保持不变。 保留在绑定寄存器204的元数据可以用于指定可以使用处理器200访问（加载/存储）的存储器地址的范围。版权所有：（C）2011，JPO＆INPIT

公开(公告)号：JP2007183952A

公开(公告)日：2007-07-19

申请号：JP2006349813

申请日：2006-12-26

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： NEIGER GILBERT ,  ANDERSON ANDREW V ,  BENNETT STEVEN M ,  MUDUKKARUMUKUMANA RAJESH SANKA ,  UHLIG RICHARD A ,  PARTHASARATHY RAJESH S ,  SCHOENBURG SEBASTIAN

IPC: G06F3/06

CPC classification number: G06F12/1441 ,  G06F12/145 ,  G06F2009/45587

Abstract: PROBLEM TO BE SOLVED: To provide a method, an apparatus and a system which achieve effective virtualization of resources in an information processing system. SOLUTION: The system is composed of an evaluation logic which determines whether or not an access is permitted based on its access type responding to an attempt of a guest who accesses a device using a memory address that is converted to the device, and an exit logic which transfers control of the apparatus from the guest to a host if the evaluation logic determined that the access is not permitted. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在信息处理系统中实现资源的有效虚拟化的方法，装置和系统。 解决方案：该系统由评估逻辑组成，该判定逻辑基于其访问类型来确定是否允许访问，该访问类型响应于使用转换为设备的存储器地址来访问设备的访客的尝试，以及 退出逻辑，如果评估逻辑确定不允许访问，则将装置的控制从客户转移到主机。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2013080490A

公开(公告)日：2013-05-02

申请号：JP2012261129

申请日：2012-11-29

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： HUGHES CHRISTOPHER ,  CHEN YEAN-KUANG ,  BOMB MAYANK ,  BRANDT JASON W ,  BUXTON MARK J ,  CHARNEY MARK J ,  CHENNUPATY SRINIVAS ,  CORBAL JESUS ,  DIXON MARTIN G ,  GIRKAR MILIND B ,  HALL JONATHAN C ,  IDO HIDEKI SAITO ,  LACHNER PETER ,  NEIGER GILBERT ,  NEWBURN CHRIS J ,  PARTHASARATHY RAJESH S ,  TOLL BRET L ,  VALENTINE ROBERT ,  WIEDEMEIER JEFFREY G

IPC: G06F9/30 ,  G06F9/48 ,  G06F11/28 ,  G06F12/10 ,  G06F17/16

CPC classification number: G06F9/30018 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30109 ,  G06F9/3865

Abstract: PROBLEM TO BE SOLVED: To provide a processor which reduces overhead in gathering and scattering multiple data elements.SOLUTION: Efficient data transfer operations can be achieved by: decoding by a processor device 140, 160, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an operation execution unit in the processor; detecting occurrence of an exception during execution of the single instruction; and, in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.

Abstract translation: 要解决的问题：提供一种减少收集和散射多个数据元素的开销的处理器。 解决方案：可以通过以下方式来实现有效的数据传送操作：由处理器设备140,160解码指定在第一存储位置和第二存储位置之间的多个数据元素的传送操作的单个指令; 发出由处理器中的操作执行单元执行的单个指令; 在单个指令的执行期间检测异常的发生; 并且响应于异常，在传递异常之前将异常陷阱或中断传递给异常处理程序。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2011227939A

公开(公告)日：2011-11-10

申请号：JP2011178882

申请日：2011-08-18

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： SUTTON II JAMES ,  DAVID GRAWROCK ,  RICHARD UHLIG ,  DAVID POISNER ,  ANDREW GREW ,  CLIFFORD HOLE ,  LAWRENCE SMITH III ,  NEIGER GILBERT ,  MICHAEL KOZUCH ,  ROBERT GEORGE ,  BRADLEY BURGESS

IPC: G06F1/00 ,  G06F21/22 ,  G06F9/46 ,  G06F12/14 ,  G06F21/00

CPC classification number: G06F21/53 ,  G06F12/1491 ,  G06F21/57 ,  G06F2221/2105

Abstract: PROBLEM TO BE SOLVED: To disclose a system and a method for allowing execution of a system management mode (SMM) code during secure operations in a microprocessor system.SOLUTION: In one embodiment, a system management interruption (SMI) can be first directed to a handler in a secured virtual machine monitor (SVMM). Then, the SMI can be redirected to a SMM code located in a virtual machine (VM) which is under the security control of the SVMM. This redirection can be achieved by enabling reading from and writing onto the system management (SM) base register in the processor.

Abstract translation: 要解决的问题：公开在微处理器系统中的安全操作期间允许执行系统管理模式（SMM）代码的系统和方法。 解决方案：在一个实施例中，系统管理中断（SMI）可以首先被引导到安全虚拟机监视器（SVMM）中的处理程序。 然后，SMI可以被重定向到位于SVMM的安全控制下的虚拟机（VM）中的SMM代码。 可以通过在处理器中读取和写入系统管理（SM）基址寄存器来实现此重定向。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2011181094A

公开(公告)日：2011-09-15

申请号：JP2011106136

申请日：2011-05-11

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BRANDT JASON ,  MONDAL SANJOY K ,  UHLIG RICHARD ,  NEIGER GILBERT ,  GEORGE ROBERT

IPC: G06F12/10 ,  G06F9/46 ,  G06F9/48

CPC classification number: G06F12/1027 ,  G06F9/45533 ,  G06F9/45558 ,  G06F9/4843 ,  G06F12/0292 ,  G06F12/0804 ,  G06F12/0891 ,  G06F12/1036 ,  G06F12/1063 ,  G06F12/109 ,  G06F12/12 ,  G06F12/123 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/30 ,  G06F2212/50 ,  G06F2212/604 ,  G06F2212/657 ,  G06F2212/68 ,  G06F2212/683 ,  G06F2212/684 ,  G06F2212/69

Abstract: PROBLEM TO BE SOLVED: To reduce the overhead associated with switching the context of an address space. SOLUTION: This method includes: a step of switching the context between the first address space and the second address space by the processor of a system; a step of determining whether the second address space exists in a list of address spaces stored in a scratch pad memory of the processor; a step of allocating a new entry of the second address space that is different from the current entry of the first address space after switching the context to the second address space if the second address space does not exist in the list of address spaces; and a step of maintaining the current entry of the first address space to a conversion buffer of the processor after switching the context to the second address space if the second address space exists in the list of address space. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：减少与切换地址空间的上下文相关的开销。 解决方案：该方法包括：由系统的处理器切换第一地址空间和第二地址空间之间的上下文的步骤; 确定第二地址空间是否存在于存储在处理器的临时存储器存储器中的地址空间的列表中的步骤; 如果第二地址空间不存在于地址空间列表中，则将上下文切换到第二地址空间之后，分配与第一地址空间的当前条目不同的第二地址空间的新条目的步骤; 以及如果第二地址空间存在于地址空间列表中，则在将上下文切换到第二地址空间之后，将第一地址空间的当前条目保持到处理器的转换缓冲器的步骤。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009163751A

公开(公告)日：2009-07-23

申请号：JP2009028629

申请日：2009-02-10

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BENNETT STEVEN ,  NEIGER GILBERT ,  COTA-ROBLES ERIK ,  JEYASINGH STALINSELVARAJ ,  KAGI ALAIN ,  KOZUCH MICHAEL ,  UHLIG RICHARD

IPC: G06F9/46 ,  G06F9/455 ,  G06F9/48

CPC classification number: G06F9/45558 ,  G06F2009/4557

Abstract: PROBLEM TO BE SOLVED: To perform better management and control of VM (virtual machine) operations.
SOLUTION: Methods and systems are provided to control transitions between a virtual machine (VM) and a Virtual Machine Monitor (VMM). A processor uses state action indicators to load and/or store associated elements of a machine state before completing the transition. The state action indicators may be stored in a Virtual Machine Control Structure (VMCS), predetermined, and/or calculated dynamically. In some embodiments, the values loaded can be directly acquired from the VMCS, predetermined and/or calculated dynamically. In some embodiments, the values stored may be acquired directly from the machine state, predetermined and/or calculated dynamically.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：执行VM（虚拟机）操作的更好的管理和控制。 解决方案：提供方法和系统来控制虚拟机（VM）和虚拟机监视器（VMM）之间的转换。 在完成转换之前，处理器使用状态动作指示器加载和/或存储机器状态的相关元素。 状态动作指示符可以存储在虚拟机控制结构（VMCS）中，预定的和/或动态地计算。 在一些实施例中，可以从VMCS直接获取加载的值，预先确定和/或动态地计算。 在一些实施例中，存储的值可以直接从机器状态获取，预定和/或动态地计算。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2014112383A

公开(公告)日：2014-06-19

申请号：JP2013262672

申请日：2013-12-19

Applicant: Intel Corp ,  インテル・コーポレーション

Inventor： FRANCIS X MCKEEN ,  CARLOS V ROZAS ,  UDAY R SAVAGANKAR ,  SIMON P JOHNSON ,  VINCENT R SCARLATA ,  MICHAEL A GOLDSMITH ,  ERNIE BRICKELL ,  LI JIANGTAO ,  HOWARD C HERBERT ,  PRASHANT DEWAN ,  STEPHEN J TOLOPKA ,  NEIGER GILBERT ,  DAVID DURHAM ,  GARY GRAUNKE ,  BERNARD LINT ,  DON A VAN DYKE ,  JOSEPH CIHULA ,  STALINSELVARAJ JEYASINGH ,  STEPHEN R VAN DOREN ,  DION RODGERS ,  JOHN GARNEY ,  ASHER ALTMAN

IPC: G06F12/14 ,  G06F12/10 ,  G06F21/10 ,  G06F21/12

Abstract: PROBLEM TO BE SOLVED: To enable integrity of secure applications and their data to be achieved within a computer system.SOLUTION: In a microprocessor 100, each processor core 105, 110 includes logic 119 for implementing secure enclave techniques, to perform efficient resource allocation among a plurality of cores or processors, establishing one or more secure enclaves in which an application and data may be stored and executed.

Abstract translation: 要解决的问题：使安全应用及其数据在计算机系统内实现的完整性。解决方案：在微处理器100中，每个处理器核心105,110包括用于实现安全飞行技术的逻辑119，以便在 多个核心或处理器，建立其中可以存储和执行应用程序和数据的一个或多个安全空间。

公开(公告)号：JP2013257911A

公开(公告)日：2013-12-26

申请号：JP2013204470

申请日：2013-09-30

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BRANDT JASON ,  MONDAL SANJOY K ,  RICHARD UHLIG ,  NEIGER GILBERT ,  ROBERT GEORGE

IPC: G06F12/10 ,  G06F12/12

CPC classification number: G06F12/1027 ,  G06F9/45533 ,  G06F9/45558 ,  G06F9/4843 ,  G06F12/0292 ,  G06F12/0804 ,  G06F12/0891 ,  G06F12/1036 ,  G06F12/1063 ,  G06F12/109 ,  G06F12/12 ,  G06F12/123 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/30 ,  G06F2212/50 ,  G06F2212/604 ,  G06F2212/657 ,  G06F2212/68 ,  G06F2212/683 ,  G06F2212/684 ,  G06F2212/69

Abstract: PROBLEM TO BE SOLVED: To further effectively maintain pipeline resources by switching contexts.SOLUTION: According to a first embodiment of this invention, switching is made between guest software and a virtual machine monitor, whether storage in a protected location causes the switching is determined, and at least one entry of processor resources corresponding to the protected location is selectively flushed while maintaining another entry of processor resources corresponding to the guest software.

Abstract translation: 要解决的问题：通过切换上下文来进一步有效地维护管道资源。解决方案：根据本发明的第一实施例，在客户软件和虚拟机监视器之间进行切换，确定在受保护位置中的存储是否导致切换， 并且对应于受保护位置的处理器资源的至少一个条目被有选择地刷新，同时保持对应于客户软件的处理器资源的另一条目。