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公开(公告)号：US10373844B2
公开(公告)日：2019-08-06
申请号：US15590890
申请日：2017-05-09
Applicant: INTEL IP CORPORATION
Inventor： Sven Albers , Sonja Koller , Thorsten Meyer , Georg Seidemann , Christian Geissler , Andreas Wolter
Abstract: Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface. In embodiments, the second surface may be shaped such that one or more cross-section areas of the IC package are thinner than one or more other cross-section areas of the IC package. Other embodiments may be described and/or claimed.
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公开(公告)号：US10115668B2
公开(公告)日：2018-10-30
申请号：US14970355
申请日：2015-12-15
Applicant: Intel IP Corporation
Inventor： Klaus Jürgen Reingruber , Sven Albers , Christian Georg Geissler , Georg Seidemann , Bernd Waidhas , Thomas Wagner , Marc Dittes
IPC: H01L23/522 , H01L23/528 , C25D5/02 , C25D5/10 , C25D5/48 , C25D5/54 , C25D7/12 , H01L23/00 , H05K1/02 , H05K1/11 , H01L23/498
Abstract: Semiconductor packages having variable redistribution layer thicknesses are described. In an example, a semiconductor package includes a redistribution layer on a dielectric layer, and the redistribution layer includes first conductive traces having a first thickness and second conductive traces having a second thickness. The first thickness may be different than the second thickness, e.g., the first thickness may be less than the second thickness.
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公开(公告)号：US20170345678A1
公开(公告)日：2017-11-30
申请号：US15590890
申请日：2017-05-09
Applicant: INTEL IP CORPORATION
Inventor： Sven Albers , Sonja Koller , Thorsten Meyer , Georg Seidemann , Christian Geissler , Andreas Wolter
CPC classification number: H01L21/56 , H01L21/568 , H01L21/78 , H01L23/3128 , H01L23/562 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3511 , H01L2924/00
Abstract: Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface. In embodiments, the second surface may be shaped such that one or more cross-section areas of the IC package are thinner than one or more other cross-section areas of the IC package. Other embodiments may be described and/or claimed.
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公开(公告)号：US20170256480A1
公开(公告)日：2017-09-07
申请号：US15062143
申请日：2016-03-06
Applicant: Intel IP Corporation
Inventor： Klaus Reingruber , Sven Albers , Christian Geissler
IPC: H01L23/498 , H05K1/16 , H01L21/56 , H01L23/00 , H01L23/522 , H01L21/48
Abstract: Disclosed herein are electronic components having three-dimensional capacitors disposed in a metallization stack, as well as related methods and devices. In some embodiments, for example, an electronic component may include: a metallization stack and a capacitor disposed in the metallization stack wherein the capacitor includes a first conductive plate having a plurality of recesses, and a second conductive plate having a plurality of projections, wherein individual projections of the plurality of projections extend into corresponding individual recesses of the plurality of recesses without contacting the first conductive plate.
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公开(公告)号：US09741651B1
公开(公告)日：2017-08-22
申请号：US15052505
申请日：2016-02-24
Applicant: Intel IP Corporation
Inventor： Klaus Reingruber , Sven Albers , Christian Geissler
IPC: H01F5/00 , H01L23/498 , H01L21/48
CPC classification number: H01L23/49838 , H01L21/4846 , H01L24/19 , H01L2224/04105
Abstract: Embodiments herein may relate to a package with a dielectric layer having a first face and a second face opposite the first face. A conductive line of a patterned metal redistribution layer (RDL) may be coupled with the second face of the dielectric layer. The line may include a first portion with a first width and a second portion directly coupled to the first portion, the second portion having a second width. The first portion may extend beyond a plane of the second face of the dielectric layer, and the second portion may be positioned between the first face and the second face of the dielectric layer. Other embodiments may be described and/or claimed.
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Patent Agency Ranking
公开(公告)号：US20170062306A1
公开(公告)日：2017-03-02
申请号：US14839510
申请日：2015-08-28
Applicant: Intel IP Corporation
Inventor： Sven Albers , Klaus Reingruber , Andreas Wolter , Georg Seidemann , Christian Geissler , Alexandra Atzesdorfer , Sonja Koller
IPC: H01L23/427 , H01L23/373
CPC classification number: H01L23/3737 , G06F1/203 , G06F2200/201 , H01L23/373 , H01L23/427 , H01L2224/16225 , H01L2924/15311
Abstract: Embodiments of the present disclosure relate to a cooler for semiconductor devices. The semiconductor device may be electrically coupleable to a power source. The device may generate heat when the power source supplies power to the device during use of the device. The cooler may be coupled to one or more surfaces of the device. The cooler may include a hydrophilic material to adsorb water from ambient air. During operation of the device, the cooler may cool the device by conduction of heat away from the device to the cooler. The cooler may include water that is evaporated during use of the device to increase cooling capacity of the cooler. The cooler may be recharged with water from humidity in air when the device is not operated or operated at a lower power level. Other embodiments may be described and/or claimed.
Abstract translation: 本公开的实施例涉及一种用于半导体器件的冷却器。 半导体器件可以电耦合到电源。 当设备使用期间电源向设备供电时，设备可能会产生热量。 冷却器可以联接到装置的一个或多个表面。 冷却器可以包括用于从环境空气中吸附水的亲水材料。 在设备运行期间，冷却器可以通过将热量从设备传导到冷却器来冷却设备。 冷却器可以包括在使用装置期间蒸发的水以增加冷却器的冷却能力。 当设备未在较低功率水平下操作或操作时，冷却器可能会在空气中从潮湿的水中充电。 可以描述和/或要求保护其他实施例。
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公开(公告)号：US10522485B2
公开(公告)日：2019-12-31
申请号：US15776474
申请日：2015-12-21
Applicant: Intel IP Corporation
Inventor： Christian Geissler , Sven Albers , Georg Seidemann , Andreas Wolter , Klaus Reingruber , Thomas Wagner , Marc Dittes
IPC: H01L23/52 , H01L23/00 , H01L21/768 , H01L23/525 , H01L23/532
Abstract: An electrical device includes a redistribution layer structure, an inter-diffusing material contact structure and a vertical electrically conductive structure located between the redistribution layer structure and the inter-diffusing material contact structure. The vertical electrically conductive structure includes a diffusion barrier structure located adjacently to the inter-diffusing material contact structure. Further, the diffusion barrier structure and the redistribution layer structure comprise different lateral dimensions.
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公开(公告)号：US20190072732A1
公开(公告)日：2019-03-07
申请号：US16182450
申请日：2018-11-06
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
CPC classification number: G02B6/428 , G02B6/12002 , G02B6/122 , G02B6/1221 , G02B6/132 , G02B6/30 , G02B6/4232 , G02B6/4238 , G02B6/43 , G02B2006/12197
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US10209466B2
公开(公告)日：2019-02-19
申请号：US15089524
申请日：2016-04-02
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US20180226185A1
公开(公告)日：2018-08-09
申请号：US15862196
申请日：2018-01-04
Applicant: Intel IP Corporation
Inventor： Sven Albers , Klaus Reingruber , Andreas Wolter
CPC classification number: H01F27/2804 , H01F27/06 , H01F27/24 , H01F2027/065 , H01F2027/2809
Abstract: An electronic package that includes a substrate; a first electronic component mounted on one side of the substrate; a second electronic component mounted on an opposing side of the substrate; a core mounted to the substrate, wherein the core extends through the substrate; a first wire electrically attached to at least one of the first electronic component and the substrate, wherein the first wire is wrapped around the core to form a first coil on the one side of the substrate; and a second wire electrically attached to at least one of the second electronic component and the substrate, wherein the second wire is wrapped around the core to form a second coil on the opposing side of the substrate.
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