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    Process for manufacturing SOI structures
    23.
    发明公开
    Process for manufacturing SOI structures 审中-公开
    Verfahren zur Herstellung von SOI-Strukturen

    公开(公告)号：EP1326272A1

    公开(公告)日：2003-07-09

    申请号：EP01830822.1

    申请日：2001-12-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Villa, Flavio ,  Barlocchi, Gabriele ,  Corona, Pietro

    IPC: H01L21/762 ,  H01L21/316 ,  H01L21/306

    CPC classification number: H01L21/76262 ,  H01L21/31662 ,  H01L21/76208

    Abstract: For manufacturing an SOI substrate, the following steps are carried out: providing a wafer (1) of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity (9) and laterally delimiting a plurality of pillars of semiconductor material (10); and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate (2); an epitaxial layer (11) is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape; and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings (13a) are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings (13a).

    Abstract translation: 为了制造SOI衬底，进行以下步骤：提供半导体材料的晶片（1）; 在所述晶片内部形成多个通道，所述多个通道形成迷宫腔（9）并横向限定多个半导体材料柱（10）; 并氧化半导体材料的柱以形成掩埋绝缘层。 为了形成迷宫腔，首先在衬底（2）中形成沟槽; 生长外延层（11），其封闭顶部的沟槽; 晶片退火以使柱变形并使其呈现最小能量手柄状形状; 并且去除晶片的周边部分以到达迷宫腔，并且在迷宫腔中形成侧入口（13a）。 通过从侧入口（13a）供给氧化流体来进行氧化。

    Method for the manufacture of electromagnetic radiation reflecting devices
    25.
    发明公开
    Method for the manufacture of electromagnetic radiation reflecting devices 审中-公开
    一种用于生产器件的方法用于反射电磁辐射的

    公开(公告)号：EP1312943A1

    公开(公告)日：2003-05-21

    申请号：EP01830701.7

    申请日：2001-11-14

    Applicant: STMicroelectronics S.r.l.

    Inventor： Mastromatteo, Ubaldo ,  Corona, Pietro ,  Villa, Flavio ,  Barlocchi, Gabriele

    IPC: G02B5/08 ,  G02B6/36

    CPC classification number: G11B7/1362 ,  G02B5/08 ,  G02B6/4214 ,  G11B7/123 ,  Y10T428/12528

    Abstract: Method for manufacturing electromagnetic radiation reflecting devices (23), said method comprising the steps of:

    a) providing a silicon substrate (1) defined by at least one first free surface (2),
    b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface (2),
    c)etching the region of the free surface (2) by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface (16) of the substrate inclined in relation to said first surface. Furthermore, said first free surface (2) is parallel to the crystalline planes {110} of silicon substrate and said step c) comprises a progressing step of the anisotropic agent such that the second free surface (16) resulting from the etching step is parallel to the planes {100} of said substrate (1).

    Abstract translation: （23）所述的方法包括以下步骤：用于制造电磁辐射反射装置的方法：a）提供一个硅衬底（1）由至少一个第一自由表面（2）定义，b）形成于所述第一表面的保护层 在开口设置有材料暴露第一自由表面（2）的一个区域，c）通过各向异性剂的方式蚀刻所述自由表面（2）的区域，以除去所述基板的至少一个部分并限定第二自由 在倾斜于所述第一表面的基板的表面（16）。 进一步，所述第一自由表面（2）是平行于晶面的硅基板的ä110ü和所述步骤c）包括将所述各向异性剂的进展步骤检查做了第二自由表面（16）从蚀刻步骤产生平行于 所说基片的俯视ä100ü（1）。

    Method for producing an SOI wafer
    27.
    发明公开
    Method for producing an SOI wafer 有权
    Herstellungsverfahrenfüreine SOI-Scheibe

    公开(公告)号：EP1009024A1

    公开(公告)日：2000-06-14

    申请号：EP98830743.5

    申请日：1998-12-10

    Applicant: STMicroelectronics S.r.l.

    Inventor： Barlocchi, Gabriele ,  Villa, Flavio

    IPC: H01L21/762

    CPC classification number: H01L21/76262

    Abstract: The method comprises the steps of: on a wafer (1) of monocrystalline semiconductor material, forming a hard mask (9) of an oxidation-resistant material, defining first protective regions (7) covering first portions (21) of the wafer (1); excavating the second portions (8'') of the wafer (1), forming initial trenches (10) extending between the first portions (8') of the wafer (1); thermally oxidating the wafer (1), forming a sacrificial oxide layer (14) extending at the lateral and base walls (10a, 10b) of the initial trenches (10), below the first protective regions (7); and wet etching the wafer (1), to completely remove the sacrificial oxide layer (14). Thereby, intermediate trenches (10') are formed, the lateral walls (10a') of which are recessed with respect to the first protective regions (7). Subsequently, a second oxide layer 11 is formed inside the intermediate trenches 10'; a second silicon nitride layer 12 is deposited; final trenches 16 are produced; a buried oxide region 22 is formed, and finally an epitaxial layer 23 is grown.

    Abstract translation: 该方法包括以下步骤：在单晶半导体材料的晶片（1）上形成耐氧化材料的硬掩模（9），限定覆盖晶片（1）的第一部分（21）的第一保护区域（7） ）; 挖掘晶片（1）的第二部分（8“），形成在晶片（1）的第一部分（8'）之间延伸的初始沟槽（10）; 热氧化所述晶片（1），形成在所述初始沟槽（10）的侧壁和底壁（10a，10b）处延伸的牺牲氧化物层（14），在所述第一保护区域（7）的下方。 并湿式蚀刻晶片（1），以完全去除牺牲氧化物层（14）。 由此，形成中间沟槽（10'），其侧壁（10a'）相对于第一保护区域（7）凹陷。 随后，在中间沟槽10'内形成第二氧化物层11; 沉积第二氮化硅层12; 生产最终的沟槽16; 形成掩埋氧化物区域22，最后生长外延层23。

    Method for producing an SOI wafer
    28.
    发明公开
    Method for producing an SOI wafer 失效
    Verfahren zur Herstellung采用SOI衬底

    公开(公告)号：EP0929095A1

    公开(公告)日：1999-07-14

    申请号：EP98830007.5

    申请日：1998-01-13

    Applicant: STMicroelectronics S.r.l.

    Inventor： Villa, Flavio ,  Barlocchi, Gabriele

    IPC: H01L21/00

    CPC classification number: H01L21/76294

    Abstract: The method comprises the steps of: on a monocrystalline silicon wafer (1), forming protective regions (30) having the shape of an overturned U, made of an oxidation resistant material, covering first wafer portions (18); forming deep trenches (16) in the wafer which extend between, and laterally delimit the first wafer portions (18); completely oxidising the first wafer portions except their upper areas (21) which are covered by the protective regions, forming at least one continuous region (22) of covered oxide that superimposed by the non-oxidised upper portions (21); removing the protective regions (30); and epitaxially growing a crystalline semiconductor material layer (23) from the non-oxidised upper portions.

    Abstract translation: 该方法包括以下步骤：在单晶硅晶片（1）上形成覆盖第一晶片部分（18）的由抗氧化材料制成的具有翻转U形状的保护区域（30）; 在所述晶片中形成在所述第一晶片部分（18）之间延伸并横向限定所述第一晶片部分（18）的深沟槽（16）; 完全氧化除了由保护区域覆盖的上部区域（21）之外的第一晶片部分，形成由非氧化的上部（21）叠加的至少一个覆盖的氧化物的连续区域（22）。 去除保护区域（30）; 并从非氧化的上部外延生长结晶半导体材料层（23）。

    Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured
    29.
    发明公开
    Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured 审中-公开
    一种用于制造半导体晶片具有SOI绝缘沟槽和相应的晶片工艺

    公开(公告)号：EP1881527A1

    公开(公告)日：2008-01-23

    申请号：EP06425494.9

    申请日：2006-07-17

    Applicant: STMicroelectronics S.r.l.

    Inventor： Barlocchi, Gabriele ,  Corona, Pietro ,  Villa, Flavio Francesco

    IPC: H01L21/762

    CPC classification number: H01L21/76264 ,  H01L21/7682

    Abstract: A process for manufacturing a semiconductor wafer including SOI-insulation wells envisages forming, in a die region (5; 105) of a semiconductor body (2, 17; 102, 117), buried cavities (20, 21, 22; 110', 111', 112') and semiconductor structural elements (13', 14', 15'; 113', 114', 115'), which traverse the buried cavities and are distributed in the die region (5; 105). The process moreover includes the step of oxidizing selectively first adjacent semiconductor structural elements (13'; 113'), arranged inside a closed region (6; 106), and preventing oxidation of second semiconductor structural elements (14'; 114') outside the closed region (6; 106), so as to form a die buried dielectric layer (29; 129) selectively inside the closed region (6; 106).

    Abstract translation: 半导体本体的;一种用于制造半导体晶片包含SOI绝缘井设想形成，在一个区域（105 5）方法（2，17; 102，117），埋空腔（20，21，22; 110”， 111 '112 '）和半导体结构元件（13'，14' ，15 '; 113'，114'，115' ），其穿过所述掩埋腔和分布在区域（5; 105）。 该方法更超过包括氧化步骤选择性第一相邻的半导体结构元件（13”，113‘），一个封闭的区域（6; 106）内设置的外部，和第二半导体结构元件防止氧化（14’，114' ） 闭区域（6; 106），以便形成一个掩埋介电层，其中（29; 129）选择性地将所述闭合区域（6; 106）的内部。

    Process for manufacturing thick suspended structures of semiconductor material
    30.
    发明公开
    Process for manufacturing thick suspended structures of semiconductor material 有权
    制造厚悬浮结构的方法，由半导体材料制成

    公开(公告)号：EP1770055A1

    公开(公告)日：2007-04-04

    申请号：EP05425676.3

    申请日：2005-09-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Corona, Pietro ,  Villa, Flavio Francesco ,  Barlocchi, Gabriele

    IPC: B81B3/00

    CPC classification number: B81C1/00158 ,  B81B2201/025 ,  B81B2203/0109 ,  B81B2203/0315

    Abstract: A process for manufacturing a suspended structure (20) of semiconductor material envisages the steps of: providing a monolithic body (10) of semiconductor material having a front face (10a); forming a buried cavity (17) within the monolithic body (10), extending at a distance from the front face (10a) and delimiting, with the front face (10a), a surface region (18) of the monolithic body (10), said surface region (18) having a first thickness (w 1 ); carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body (10) towards the surface region (18) and thus form a suspended structure (20) above the buried cavity (17), the suspended structure (20) having a second thickness (w 2 ) greater than the first thickness (w 1 ). The thickening thermal treatment is an annealing treatment.

    Abstract translation: 一种用于制造半导体材料的悬浮结构（20）方法设想的以下步骤：提供半导体材料的整体式主体（10），其具有前表面（10A）; 形成在从所述前表面（10a）的延伸一段距离并限定，与所述整体式主体的前表面（10a）中，表面区域（18）的整体式主体内的掩埋空腔（17）（10）（10） 具有第一厚度（W 1）所述的表面区域（18）; 进行增稠热处理：如，以使整体式主体（10）朝向所述表面区域（18）并且因此半导体材料的迁移形成掩埋空腔（17）之上的悬挂结构（20），所述悬挂结构（ 20）具有第二厚度（W 2）比所述第一厚度更大的（W 1）。 增稠热处理是退火处理。

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