ELECTRON EMITTING ELEMENT
    21.
    发明专利

    公开(公告)号:JP2001185714A

    公开(公告)日:2001-07-06

    申请号:JP36707499

    申请日:1999-12-24

    Applicant: TOSHIBA CORP

    Abstract: PROBLEM TO BE SOLVED: To prevent the occurrence of the dielectric breakdown which is apt to occur between an emitter and a gate. SOLUTION: An electron emitting element comprises a structural substrate, an emitter which is formed on the substrate and has a sharp front end, and an insulating layer which is formed around the emitter in such a way that the front end of the emitter is exposed. The element also comprises a gate electrode which covers the insulating layer in such a way that the front end of the emitter is exposed. The opening of the gate is made smaller in size than the base section of the emitter and the distance from the emitter to the gate along the insulating layer is made longer than the linear distance from the emitter to the gate.

    VACUUM MICRO ELEMENT AND MANUFACTURE THEREOF

    公开(公告)号:JP2000251615A

    公开(公告)日:2000-09-14

    申请号:JP4980299

    申请日:1999-02-26

    Applicant: TOSHIBA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a new vacuum micro element producing method and a structure thereof showing a highest characteristic obtained, when a diamond is used for an emitter. SOLUTION: A thermally oxidated film 104 serving as a gate insulation layer is formed at an Si substrate 101, having a recessed portion 102 whose bottom is made sharp, and a diamond layer being an emitter layer is formed only in a mold. The Si substrate 101 is connected to a glass substrate which is a second substrate, and the substrate 101 is removed by etching. A gate layer and a thermally oxidated film which is the gate layer are etched in order to expose a protruding portion of the diamond layer 103 being the emitter layer, and thereby a diamond emitter is formed.

    DIAMOND PLANE TYPE ELECTRON EMISSION ELEMENT

    公开(公告)号:JP2000067738A

    公开(公告)日:2000-03-03

    申请号:JP24147098

    申请日:1998-08-27

    Applicant: TOSHIBA CORP

    Abstract: PROBLEM TO BE SOLVED: To decrease gate current without increasing operating voltage and enhance efficiency by forming a low work function electron emission material layer supported on the surface of a substrate and having a diameter smaller than an opening diameter of a gate layer. SOLUTION: An SiO2 layer as an insulating layer and an Mo layer 13 as a gate layer are formed on an Si substrate 11 in order, and etching treatment is conducted to expose the Si surface to form an opening 14. Then, an Al layer 15 is formed, seeding treatment is conducted, and only the Al layer 15 is selectively etched to remove it. A diamond layer 17b acting as an emitter layer is formed. Since the growth of diamond occurs in only a part 16 where seeding treatment is conducted, an emitter comprising diamond having a diameter smaller than the opening diameter of a gate. Therefore, diamond is formed in only the central part of the opening 14 contributing to anode current. Since a part of the end of a gate layer contributing to the gate current is the Si surface having a large work function, field emission is practically not generated.

    VACUUM MICROELEMENT
    25.
    发明专利

    公开(公告)号:JPH09265895A

    公开(公告)日:1997-10-07

    申请号:JP7562596

    申请日:1996-03-29

    Applicant: TOSHIBA CORP

    Abstract: PROBLEM TO BE SOLVED: To enable anode to be integrated by forming an anode, an anode gate, and a gate layer based on the three-layer structure board of Si/oxidation film/Si being structurally stable and providing high pressure resistance, structural strength, and stability. SOLUTION: An Si layer 1 is made by anode-formation, an anode-formation Si layer 2 is formed, this layer is oxidized, an anode-formation thermal oxidation Si layer 3 is formed, them then it is adhered to another Si layer. Here, the thickness of the anode-formation thermal oxidation Si layer 3 is 1 to 200 micrometers and 1/2 of the Si layer 1, and deformation due to stress is prevented. Next, boron is diverged in a gate Si layer with high concentration, and a p++ diffusion layer 6 is formed. Further, an emitter mold 7 is etched, and a thermal; oxidation Si layer 8 is formed to be a gate insulation film. Furthermore, an anode Si layer is etched, and an anode opening 9 is formed. Moreover, an emitter layer 11, an anode gate insulation spacer opening 10, a gate opening 12, and an insulation layer 13 are formed. Thereby, high pressure resistance, structural strength, stability, and integration are ensured.

    FIELD EMISSION TYPE COLD CATHODE AND ITS MANUFACTURE

    公开(公告)号:JPH09213201A

    公开(公告)日:1997-08-15

    申请号:JP1744796

    申请日:1996-02-02

    Applicant: TOSHIBA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a field emission type cold cathode which can set an anode closely, by etching an etching layer at the tip of an emitter and exposing the emitter tip. SOLUTION: This field emission type cold cathode has a glass base 42; a junction layer 41 formed on the glass base 42, consisting of Al, and being a feeder layer concurrectly; and an emitter material layer 40 having plural square pyramid form projections. Furthermore, a thermal oxidation SiO2 insulator layer 39 formed on the emitter material layer 40, having an opening, and having a columnar convex bodies 14; and a gate electrode layer 35 formed on the thermal oxidation SiO2 insulator layer 39, consisting of an n type Si layer doping P, and having an opening 50 so as to expose the tip area of the projection of the emitter material layer 40, and the opening end of the thermal oxidation SiO2 insulator layer 39; are laminated, to form this structure.

    FINE PATTERN FORMING APPARATUS AND CHARACTERISTICS MEASURING APPARATUS

    公开(公告)号:JPH08248064A

    公开(公告)日:1996-09-27

    申请号:JP5594995

    申请日:1995-03-15

    Applicant: TOSHIBA CORP

    Abstract: PURPOSE: To obtain a fine pattern forming apparatus for forming a fine structure on the order of nm. CONSTITUTION: The fine pattern forming apparatus comprises a body to be processed connected with one electrode of a DC power supply circuit with an electron-sensitive resist layer 5 being provided on the surface thereof, and a transfer pattern plate 1 having a protruding pattern of conductive material, or covered with a conductive material, connected with the other electrode of the DC power supply circuit and disposed closely or tightly to the electron- sensitive resist layer 5 on the body to be processed. The transfer pattern plate 1 is fixed to the probe part of a scanning probe unit and the electron-sensitive resist layer 5 is exposed selectively by controlling the operation of the probe part.

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