公开(公告)号：US20180082826A1

公开(公告)日：2018-03-22

申请号：US15268472

申请日：2016-09-16

Applicant: Lam Research Corporation

Inventor： Joydeep Guha ,  John Daugherty ,  Vahid Vahedi ,  Richard Alan Gottscho

IPC: H01J37/32 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01J37/32935 ,  B81C2201/0138 ,  H01J37/32082 ,  H01J37/32926 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/67069 ,  H01L21/67242 ,  H01L21/67248 ,  H01L21/67253

Abstract: Methods and systems for controlling processing state of a plasma reactor to initiate processing of production substrates and/or to determine a ready state of a reactor after the reactor has been cleaned and needs to be seasoned for subsequent production wafer processing are provided. The method initiate processing of a substrate in the plasma reactor using settings for tuning knobs of the plasma reactor that are approximated to achieve desired processing state values. A plurality of data streams are received from the plasma reactor during the processing of the substrate. The plurality of data streams are used to identify current processing state values. The method includes generating a compensation vector that identifies differences between the current processing state values and the desired processing state values. The generation of the compensation vector uses machine learning to improve and refile the identification and amount of compensation needed, as identified in the compensation vector. The method further includes transforming the compensation vector into adjustments to the settings for the tuning knobs and then applying the adjustment to the tuning knobs of the plasma reactor.

公开(公告)号：US20170341934A1

公开(公告)日：2017-11-30

申请号：US15680996

申请日：2017-08-18

Applicant: Texas Instruments Incorporated

Inventor： Lee Alan Stringer ,  Mona Eissa ,  Byron J.R. Shulver ,  Sopa Chevacharoenkul ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Mark L. Jenson

IPC: B81C1/00 ,  G01R33/00 ,  G01R33/04

CPC classification number: B81C1/00825 ,  B81C1/00365 ,  B81C2201/0138 ,  B81C2201/014 ,  G01R33/0047 ,  G01R33/0052 ,  G01R33/04

Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

公开(公告)号：US20170267521A1

公开(公告)日：2017-09-21

申请号：US15072852

申请日：2016-03-17

Applicant: Texas Instruments Incorporated

Inventor： Lee Alan Stringer ,  Mona Eissa ,  Byron J.R. Shulver ,  Sopa Chevacharoenkul ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Mark L. Jenson

IPC: B81C1/00 ,  G01R33/04 ,  G01R33/00

CPC classification number: B81C1/00825 ,  B81C1/00365 ,  B81C2201/0138 ,  B81C2201/014 ,  G01R33/0047 ,  G01R33/0052 ,  G01R33/04

Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

公开(公告)号：US09731964B2

公开(公告)日：2017-08-15

申请号：US15171002

申请日：2016-06-02

Applicant: Nivarox-FAR S.A.

Inventor： Alex Gandelhman ,  Andre Pin

IPC: B81C1/00 ,  G04D99/00 ,  G04B13/02

CPC classification number: B81C1/00619 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  B81C2201/0188 ,  B81C2201/0198 ,  G04B13/02 ,  G04B13/026 ,  G04B13/027 ,  G04D99/00

Abstract: The invention relates to a silicon-based component with at least one reduced contact surface which, formed from a method combining at least one oblique side wall etching step with a “Bosch” etch of vertical side walls, improves, in particular, the tribology of components formed by micromachining a silicon-based wafer.

公开(公告)号：US20020195423A1

公开(公告)日：2002-12-26

申请号：US10104109

申请日：2002-03-22

Applicant: REFLECTIVITY, INC.

Inventor： Satyadev R. Patel ,  Gregory P. Schaadt ,  Douglas B. MacDonald ,  Hongqin Shi ,  Andrew G. Huibers ,  Peter Heureux

IPC: C23F001/00 ,  B44C001/22 ,  C03C015/00 ,  C03C025/68

CPC classification number: B81C1/00 ,  B81B2201/045 ,  B81C1/00476 ,  B81C1/00531 ,  B81C1/00595 ,  B81C99/0025 ,  B81C2201/0138 ,  B82Y30/00 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/32135

Abstract: The etching of a material in a vapor phase etchant is disclosed where a vapor phase etchant is provided to an etching chamber at a total gas pressure of 10 Torr or more, preferably 20 Torr or even 200 Torr or more. The vapor phase etchant can be gaseous acid etchant, a noble gas halide or an interhalogen. The sample/workpiece that is etched can be, for example, a semiconductor device or MEMS device, etc. The material that is etched/removed by the vapor phase etchant is preferably silicon and the vapor phase etchant is preferably provided along with one or more diluents. Another feature of the etching system includes the ability to accurately determine the end point of the etch step, such as by creating an impedance at the exit of the etching chamber (or downstream thereof) so that when the vapor phase etchant passes from the etching chamber, a gaseous product of the etching reaction is monitored, and the end point of the removal process can be determined. The vapor phase etching process can be flow through, a combination of flow through and pulse, or recirculated back to the etching chamber. A first plasma or wet chemical etch (or both) can be performed prior to the vapor phase etch.

Abstract translation: 公开了在气相蚀刻剂中的材料的蚀刻，其中气蚀刻蚀刻剂以10托或更大，优选20托或甚至200托或更大的总气体压力提供给蚀刻室。 气相蚀刻剂可以是气态酸蚀刻剂，惰性气体卤化物或中间卤素。 被蚀刻的样品/工件可以是例如半导体器件或MEMS器件等。通过气相蚀刻剂蚀刻/去除的材料优选为硅，并且气相蚀刻剂优选与一个或多个 稀释剂。 蚀刻系统的另一特征包括能够精确地确定蚀刻步骤的终点，例如通过在蚀刻室的出口处（或其下游）处产生阻抗，使得当气相蚀刻剂从蚀刻室 ，监测蚀刻反应的气体产物，并且可以确定除去过程的终点。 气相蚀刻工艺可以流过，流过和脉冲的组合，或再循环回蚀刻室。 可以在气相蚀刻之前执行第一等离子体或湿化学蚀刻（或两者）。

公开(公告)号：US6162367A

公开(公告)日：2000-12-19

申请号：US10945

申请日：1998-01-22

Applicant: Yu-Chong Tai ,  Xuan-Oi Wang

Inventor： Yu-Chong Tai ,  Xuan-Oi Wang

IPC: B81C1/00 ,  H01L21/00 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3213 ,  C23F1/00 ,  C23F3/00 ,  H01L21/302

CPC classification number: B81C1/00531 ,  B81C99/0025 ,  B81C2201/0132 ,  B81C2201/0138 ,  H01J2237/3344 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/67069

Abstract: An apparatus and method for gas-phase bromine trifluoride (BrF.sub.3) silicon isotropic room temperature etching system for both bulk and surface micromachining. The gas-phase BrF.sub.3 can be applied in a pulse mode and in a continuous flow mode. The etching rate in pulse mode is dependent on gas concentration, reaction pressure, pulse duration, pattern opening area and effective surface area.

Abstract translation: 用于体相和表面微加工的气相溴化三氟化硼（BrF 3）硅各向同性室温蚀刻系统的装置和方法。 气相BrF3可以以脉冲模式和连续流动模式施加。 脉冲模式下的蚀刻速率取决于气体浓度，反应压力，脉冲持续时间，图案开口面积和有效表面积。

公开(公告)号：EP3109199A1

公开(公告)日：2016-12-28

申请号：EP16170668.4

申请日：2016-05-20

Applicant: Nivarox-FAR S.A.

Inventor： Gandelhman, Alex

IPC: B81C1/00 ,  B81C99/00

CPC classification number: G04D99/00 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  C23F1/00

Abstract: L'invention se rapporte à une pièce à base de silicium avec au moins un chanfrein formé à partir d'un procédé combinant au moins une étape de gravage de flancs obliques avec un gravage du type « Bosch » de flancs verticaux permettant notamment l'amélioration esthétique et l'amélioration de la tenue mécanique de pièces formées par micro-usinage d'une plaquette à base de silicium.

Abstract translation: 本发明涉及一种具有至少一个倒角的硅基组件，该方法将至少一个倾斜侧壁蚀刻步骤与垂直侧壁的“博世”蚀刻结合在一起，从而使得美学改进和组件的机械强度得到改善 通过微加工硅基晶片形成。

公开(公告)号：EP1081093B1

公开(公告)日：2006-10-04

申请号：EP00115385.7

申请日：2000-07-15

Applicant: ROBERT BOSCH GMBH

Inventor： Laermer, Franz ,  Schilp, Andrea

IPC: B81B3/00 ,  H01L21/306 ,  H01L29/84

CPC classification number: B81C1/00476 ,  B81C1/00587 ,  B81C99/0065 ,  B81C2201/0109 ,  B81C2201/0138 ,  H01L21/67075 ,  H01L21/67086

公开(公告)号：EP0068155B1

公开(公告)日：1985-08-28

申请号：EP82104712.3

申请日：1982-05-28

Applicant: International Business Machines Corporation

Inventor： Desilets, Brian Henry ,  Gunther, Thomas Anthony

IPC: H01L21/302 ,  C23F1/00 ,  G01N11/02

CPC classification number: H01J37/32935 ,  B81C1/00587 ,  B81C99/0065 ,  B81C2201/0138

公开(公告)号：WO2009010391A1

公开(公告)日：2009-01-22

申请号：PCT/EP2008/058539

申请日：2008-07-02

Applicant: ROBERT BOSCH GMBH ,  BECKER, Volker ,  LAERMER, Franz ,  FUCHS, Tino ,  LEINENBACH, Christina

Inventor： BECKER, Volker ,  LAERMER, Franz ,  FUCHS, Tino ,  LEINENBACH, Christina

IPC: H01L21/3065 ,  H01L21/3213 ,  B81C1/00 ,  B01J19/08

CPC classification number: H01L21/3065 ,  B81C1/00531 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0138 ,  H01L21/02019 ,  H01L21/30621 ,  H01L21/32135

Abstract: Die Erfindung betrifft ein Verfahren zum selektiven Ätzen einer SiGe-Mischhalbleiterschicht auf einem Silizium-Halbleitersubstrat durch trockenchemisches Ätzen der SiGe-Mischhalbleiterschicht mittels eines Ätzgases ausgewählt aus der Gruppe umfassend ClF 3 und/oder ClF 5 , wobei man dem Ätzgas ein Gas ausgewählt aus der Gruppe umfassend Cl 2 und/oder HCl zusetzt.

Abstract translation: 本发明涉及一种方法，用于通过从由ClF 3的组成的组中选择的蚀刻气体的装置选择性地蚀刻由SiGe混合半导体层的干式化学蚀刻的硅半导体衬底上的SiGe混合半导体层，和/或ClF5给蚀刻气体，从由氯气所组成的组中选择的气体 和/或加入HCl。