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公开(公告)号:KR101813180B1
公开(公告)日:2017-12-29
申请号:KR1020110063047
申请日:2011-06-28
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/335
CPC classification number: H01L29/0657 , H01L21/30604 , H01L21/30608 , H01L21/3065 , H01L29/0653 , H01L29/2003 , H01L29/66462 , H01L29/7782 , H01L29/7787
Abstract: 고전자이동도트랜지스터및 그제조방법이개시된다. 개시된고 전자이동도트랜지스터는드레인하방의기판의일부영역을제거하여캐버티를형성한구조일수 있으며, 항복전압을향상시켜소자파괴현상을방지할수 있다.
Abstract translation: 公开了高电子迁移率晶体管及其制造方法。 所公开的高电子迁移率晶体管可以具有通过去除漏极下方的衬底的一部分来形成空腔的结构,并且可以通过提高击穿电压来防止器件击穿现象。
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公开(公告)号:KR101813177B1
公开(公告)日:2017-12-29
申请号:KR1020110043082
申请日:2011-05-06
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/335
CPC classification number: H01L29/7787 , H01L29/1066 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/432 , H01L29/66462
Abstract: 고전자이동도트랜지스터(HEMT) 및그 제조방법에관해개시되어있다. 개시된 HEMT는채널층및 채널공급층을포함할수 있고, 상기채널공급층은다층구조를가질수 있다. 상기채널공급층은식각정지층및 그위에형성된상부층을포함할수 있다. 상기상부층에리세스영역이형성될수 있다. 상기리세스영역은상기상부층과식각정지층의계면까지리세스된영역일수 있다. 상기리세스영역에게이트전극이구비될수 있다.
Abstract translation: 高电子迁移率晶体管(HEMT)及其制造方法。 所公开的HEMT可以包括沟道层和沟道供应层,并且沟道供应层可以具有多层结构。 沟道供应层可以包括蚀刻停止层和形成在其上的上层。 可以形成上层擦除区域。 凹陷区域可以是上层和蚀刻停止层的界面的凹陷区域。 栅电极可以设置在凹陷区域中。
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公开(公告)号:KR101652403B1
公开(公告)日:2016-08-31
申请号:KR1020100078484
申请日:2010-08-13
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/336
CPC classification number: H01L29/7787 , H01L29/2003 , H01L29/408 , H01L29/66462
Abstract: 2DEG(2-Dimensional Electron Gas) 채널을지닌전력전자소자및 그제조방법이개시된다. 개시된전력전자소자는게이트주변에높은유전율을지닌물질로절연층을형성하고, 그주변에상대적으로낮은유전율을지닌물질을형성함으로써, 전계가특정영역에만집중되는현상을방지함으로써, 전력전자소자의필드분산효과를향상시켜, 항복전압을향상시킬수 있다.
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公开(公告)号:KR1020140130598A
公开(公告)日:2014-11-11
申请号:KR1020130049058
申请日:2013-05-01
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/335
CPC classification number: H01L29/7787 , H01L29/0619 , H01L29/1066 , H01L29/2003 , H01L29/41725 , H01L29/41766 , H01L29/66462
Abstract: 고전자이동도 트랜지스터 및 그 제조 방법이 개시된다.
고전자이동도 트랜지스터는 채널층, 상기 채널층에 2차원 전자가스(2DEG;2-Dimensional Electron Gas)를 유발하는 채널공급층, 상기 채널공급층에 서로 이격되게 마련되는 소스 전극 및 드레인 전극을 포함하고, 상기 채널공급층 상에 상기 2차원 전자가스에 디플리션 영역(depletion region)을 형성하는 적어도 하나의 디플리션 형성부가 구비되고, 상기 적어도 하나의 디플리션 형성부와 상기 소스 전극을 연결하는 적어도 하나의 브릿지와 상기 적어도 하나의 브릿지로부터 상기 소스 전극 하부로 연장되어 구비된 접촉부가 구비되어 문턱 전압의 산포를 줄일 수 있다.Abstract translation: 公开了一种高电子迁移率晶体管及其制造方法。 高电子迁移率晶体管包括:沟道层,在沟道层中引入二维电子气(2DEG)的沟道供应层,以及分别形成在沟道供应层上的源极和漏极。 在沟道供给层上形成至少一个在2DEG上形成耗尽区的耗尽形成单元。 通过包括至少一个将至少一个耗尽形成单元连接到源电极的桥以及从至少一个桥延伸到源电极的下侧的接触部分来减小阈值电压的分布。
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公开(公告)号:KR1020140042474A
公开(公告)日:2014-04-07
申请号:KR1020120109276
申请日:2012-09-28
Applicant: 삼성전자주식회사
IPC: H01L21/8238
CPC classification number: H01L29/2003 , H01L21/8252 , H01L27/0605 , H01L27/085 , H01L29/1066 , H01L29/41766 , H01L29/66462 , H01L29/7781 , H01L29/7786
Abstract: Disclosed are a semiconductor device with 2DEG and 2DHG, and a manufacturing method thereof. The semiconductor device with the 2DEG and 2DHG comprises a first compound semiconductor layer which is formed on a substrate; first to third electrodes which are formed on the first compound semiconductor layer and are separated to each other; a second compound semiconductor layer which is formed on the first compound semiconductor layer and comprises a band gap which is larger than the band gap of the first compound semiconductor layer; a third compound semiconductor layer which is positioned on the second compound semiconductor layer and comprises the 2DHG; a first gate electrode which is formed on the third compound semiconductor layer; a fourth compound semiconductor layer which is positioned on a part of the second compound semiconductor layer and comprises thickness which is thinner than the thickness of the third compound semiconductor layer; and a second gate electrode which is positioned on the fourth compound semiconductor layer. The first compound semiconductor layer comprises the 2DEG. The first gate electrode and the second gate electrode are connected to each other with a fist wiring.
Abstract translation: 公开了具有2DEG和2DHG的半导体器件及其制造方法。 具有2DEG和2DHG的半导体器件包括形成在衬底上的第一化合物半导体层; 第一至第三电极,其形成在第一化合物半导体层上并彼此分离; 第二化合物半导体层,其形成在第一化合物半导体层上,并且包括比第一化合物半导体层的带隙大的带隙; 第三化合物半导体层,其位于第二化合物半导体层上并且包含2DHG; 形成在第三化合物半导体层上的第一栅电极; 第四化合物半导体层,其位于第二化合物半导体层的一部分上,其厚度比第三化合物半导体层的厚度薄; 以及位于第四化合物半导体层上的第二栅电极。 第一化合物半导体层包括2DEG。 第一栅电极和第二栅电极通过第一布线彼此连接。
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公开(公告)号:KR1020140042473A
公开(公告)日:2014-04-07
申请号:KR1020120109275
申请日:2012-09-28
Applicant: 삼성전자주식회사
IPC: H01L29/737
CPC classification number: H01L27/0883 , H01L21/8252 , H01L27/0605 , H01L27/0694 , H01L27/085 , H01L29/2003 , H01L29/66431 , H01L29/66462 , H01L29/7787
Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The disclosed semiconductor device may include a first HFET which is formed in the first surface of a substrate and a second HFET which is formed in the second surface of the substrate. The properties of the first HFET may be different from those of the second HFET. The first HFET is may be electrically connected to the second HFET. One of the first HFET and the second HFET may be an n-type. The other may be a p-type. Both the first and the second HFET may be HEMTs. In this case, one of the first and the second HFET may have normally-on properties. The other may have normally-off properties.
Abstract translation: 公开了一种半导体器件及其制造方法。 所公开的半导体器件可以包括形成在衬底的第一表面中的第一HFET和形成在衬底的第二表面中的第二HFET。 第一HFET的性质可以不同于第二HFET的性质。 第一HFET可以电连接到第二HFET。 第一HFET和第二HFET之一可以是n型。 另一个可能是p型。 第一和第二HFET都可以是HEMT。 在这种情况下,第一和第二HFET中的一个可以具有通常的属性。 另一个可能具有常规属性。
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公开(公告)号:KR1020140023611A
公开(公告)日:2014-02-27
申请号:KR1020120089672
申请日:2012-08-16
Applicant: 삼성전자주식회사
IPC: H01L27/02 , H01L29/778
CPC classification number: H03K3/012 , H03K17/6871 , H03K2017/6875
Abstract: An electronic device including a transistor and a method for operating the same are disclosed. The disclosed electronic device can include a first transistor, a second transistor, a constant voltage applying member for applying constant voltage to a gate of the first transistor, and a switching member for applying a switching signal to the second transistor. The first transistor can obtain normally-on characteristics. The second transistor can obtain normally-off characteristics. The first transistor may be a high electron mobility transistor (HEMT). The second transistor may be a field-effect transistor (FET). The constant voltage applying member can include a diode connected to the gate of the first transistor and a constant current source connected to the diode.
Abstract translation: 公开了一种包括晶体管的电子器件及其操作方法。 所公开的电子设备可以包括第一晶体管,第二晶体管,用于向第一晶体管的栅极施加恒定电压的恒压施加构件,以及用于向第二晶体管施加开关信号的开关构件。 第一晶体管可以获得常开特性。 第二晶体管可以获得常态特性。 第一晶体管可以是高电子迁移率晶体管(HEMT)。 第二晶体管可以是场效应晶体管(FET)。 恒压施加部件可以包括连接到第一晶体管的栅极的二极管和连接到二极管的恒流源。
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公开(公告)号:KR1020140016800A
公开(公告)日:2014-02-10
申请号:KR1020130018234
申请日:2013-02-20
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/335
Abstract: The present invention relates to a high electron mobility transistor. According to one embodiment of the present invention, the high electron mobility transistor includes a channel layer, and an n-type doped contact layer formed on the channel layer and forming an ohmic contact of III-V compound semiconductor, and a channel supply layer.
Abstract translation: 本发明涉及高电子迁移率晶体管。 根据本发明的一个实施例,高电子迁移率晶体管包括沟道层和形成在沟道层上并形成III-V族化合物半导体的欧姆接触的n型掺杂接触层和沟道供应层。
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公开(公告)号:KR1020140012507A
公开(公告)日:2014-02-03
申请号:KR1020120079588
申请日:2012-07-20
Applicant: 삼성전자주식회사
IPC: H01L29/778 , H01L21/335
CPC classification number: H01L29/778 , H01L29/1066 , H01L29/2003 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/475 , H01L29/66431 , H01L29/66462 , H01L29/7786 , H01L29/872
Abstract: The present invention relates to a high electron mobility transistor (HEMT) and a method of manufacturing the same. The HEMT includes a channel layer; a channel supply layer formed on the channel layer; a source electrode and a drain electrode formd on the channel layer and the channel supply layer; a gate electrode arranged between the source and the drain gate; and a schottky electrode touching the channel supply layer and a schottky and electrically connected to the source electrode.
Abstract translation: 本发明涉及高电子迁移率晶体管(HEMT)及其制造方法。 HEMT包括一个通道层; 形成在沟道层上的沟道供给层; 源电极和漏电极形成在沟道层和沟道供应层上; 设置在源极和漏极之间的栅电极; 以及肖特基电极,其与所述沟道供给层接触并且肖特基电连接到所述源电极。
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公开(公告)号:KR1020130108001A
公开(公告)日:2013-10-02
申请号:KR1020120030245
申请日:2012-03-23
Applicant: 삼성전자주식회사
IPC: H01L21/331 , H01L29/737
CPC classification number: H01L21/268 , H01L21/28575 , H01L21/3245 , H01L29/2003 , H01L29/452 , H01L29/517 , H01L29/66462
Abstract: PURPOSE: A method for forming a selective low-temperature ohmic contact for group III nitride heterostructure device is provided to form the ohmic contact at a low temperature, thereby reducing thermal stress on a substrate. CONSTITUTION: A conductive film (50) is formed on an epi substrate (10). The epi substrate includes ohmic contact area (A). A capping layer is formed on the upper part of the conductive film or is interposed between the conductive film and a group III nitride heterostructure layer (30,32). The capping layer is formed only in one area of the ohmic contact area or a non-ohmic contact area (B). The capping layer is composed of the dual membrane of a laser reflection film and a barrier film. The ohmic contact is selectively formed in the ohmic contact area by applying laser annealing (70), induction heating or a combination of the laser annealing and the induction heating to the front surface of the substrate at a temperature less than 750°C.
Abstract translation: 目的:提供一种用于形成第III族氮化物异质结构器件的选择性低温欧姆接触的方法,以在低温下形成欧姆接触,从而降低衬底上的热应力。 构成:在外延衬底(10)上形成导电膜(50)。 外延衬底包括欧姆接触面积(A)。 在导电膜的上部形成覆盖层,或者介于导电膜和III族氮化物异质结构层(30,32)之间。 覆盖层仅形成在欧姆接触区域的一个区域或非欧姆接触区域(B)中。 盖层由激光反射膜和阻挡膜的双膜组成。 通过在小于750℃的温度下对激光退火和感应加热进行激光退火(70),感应加热或组合激光退火和感应加热,在欧姆接触区域选择性地形成欧姆接触。
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