Abstract:
다중 셀 다중 안테나 시스템에서 레이트 스플리팅 기법을 사용하기 위한 빔포밍 방법 및 장치가 개시된다. 다중 셀 다중 안테나(MIMO) 시스템에서 송/수신 빔포밍 벡터들을 적절히 결정함으로써 복수개의 단일 입력 단일 출력(SISO) 간섭 채널의 페어(pair)로 분할이 가능하다. 그리고 분할된 복수개의 페어(pair) 각각에 레이트 스플리팅 기법을 사용할 수 있다.
Abstract:
PURPOSE: A method for controlling data tunnels for coordinated multi-point data transmission among base stations and transmitting data, and controlling device for the data tunnels are provided to supply efficient interface structure for inter-base station information sharing in a wireless network. CONSTITUTION: The resource of an estimated range for a cooperative multi-point transmission among base stations is reserved(402). If the data rate over the average value of the estimated range is required in the data transmission procedure through a reserved resource, the required data rate is compared with a maximum value(404,405). If the required data rate is over the maximum value, the use of the residual resources allocated to other session within the maximum value of the estimated range is controlled(410).
Abstract:
PURPOSE: A recognition wireless communication device and a wireless connection technology selection method thereof are provided to select an RAT(Radio Access Technology) in consideration of the available capacity. CONSTITUTION: A determining unit(110) determines one RAT to a temporary control RAT. A measuring unit(120) measures an available resource and a channel state of a common RAT through the temporary control RAT. A selecting unit(130) calculates the available capacity of the common RAT by using the channel state. The selecting unit selects the RAT based on the available capacity of the common RAT.
Abstract:
PURPOSE: A stacked memory device is provided to prevent the footprints of pre-decoders or pre-drivers on a substrate from increasing by dispersing the pre-decoders or the pre-drivers on the substrate. CONSTITUTION: A plurality of memory layers(120) stacked on a substrate(110). The memory layers are divided into a plurality of groups. A plurality of inter-decoders(130) is electrically connected with each group of memory layers. Pre-decoders are electrically connected with the inter-decoders. A bottom active circuit part(150) is formed on the lower side of the memory layers and the upper side of the substrate.
Abstract:
PURPOSE: A bidirectional resistive memory device, a memory system thereof, and a data input method thereof are provided to control the offset of input data by applying a positive and a negative voltage to a variable resistor memory cell array through a write driving circuit. CONSTITUTION: An input-output circuit(1100) generates a positive and a negative voltage. The input-output circuit applies the positive or the negative voltage to a variable resistor memory cell array(1700) through a bit line in response to the logic state of input data. The input-output circuit controls the size of the positive and the negative voltage when the logic value of the data, which is written in the variable resistor memory cell array, is an offset state. A reference voltage which has a single value is applied to a common source line which is connected to the source of memory cells.
Abstract:
PURPOSE: A resistance memory device and a method of controlling input and output of the same are provided to improve the reliability of ECC code trough the margin of reading data by reducing the distribution of resistance distribution of resistive memory cells. CONSTITUTION: The input/output operation of an ECC code is separated from the input/output operation of data(S100). The separation step of the input/output operation is performed based on a mode signal and an address signal. The condition of the input/output operation of the ECC code is stricter than that of the input/output operation of data(S300). The separation step of input/output operation includes an writing operation of an ECC code from data writing.
Abstract:
PURPOSE: An information storage device and a method for operating the same are provided to facilitate the control of record/playback of information in an information storage medium. CONSTITUTION: An information storage device comprises a plurality of first storage tracks(100A), a plurality of second storage tracks(100B), a first magnetic domain wall transfer unit, and a second magnetic domain wall transfer unit. The first storage tracks are arranged in parallel. The second storage tracks are arranged in parallel above the first storage tracks and extended in a direction perpendicular to the first storage tracks. The first and second storage tracks are magnetic tracks having magnetic domain wall arranged therebetween. The first and the second magnetic domain wall transfer unit transfer the magnetic domain walls of the first and the second storage tracks, respectively.
Abstract:
PURPOSE: A semiconductor device, a semiconductor system thereof, and the programming method of a resistive memory cell are provided to rapidly program by including a write circuit. CONSTITUTION: A first bit of data is written. Data is saved in a memory cell based on a first reference resistance value. A second bit of data is written. The second bit is written based on a second reference resistance value. The second reference resistance value is greater or less than the first reference resistance value.
Abstract:
무선 통신 기지국의 동작 방법이 개시된다. 무선 통신 기지국의 동작 방법은 선점유 시스템의 커버리지 내에 위치한 하나 또는 하나 이상의 단말들로 기본 파일럿 신호를 전송하는 단계 및 인지 무선(Cognitive Radio:CR) 파일럿 신호를 전송하는 단계를 포함한다. 무선 통신, 인지 무선, 파일럿, 선점유, 단말
Abstract:
A device for determining interference by using a cyclic prefix and a method thereof are provided to determine interference occurring between the first and second networks by an interference determination unit, thereby preventing collision of a network signal. A signal receiving unit(310) receives the first signal of the first network and the second signal of the second network. A correlator(320) calculates a correlation value of the first cyclic prefix included in the first signal and a correlation value of the second cyclic prefix included in the second signal. An interference determining unit(330) determines whether interference occurs between the first network and the second network by using the correlation value of the first cyclic prefix and the correlation value of the second cyclic prefix. The interference determining unit determines an interference level.