公开(公告)号：KR1020120127166A

公开(公告)日：2012-11-21

申请号：KR1020110094568

申请日：2011-09-20

Applicant: 한국전자통신연구원

Inventor： 오힘찬 ,  박상희 ,  황치선 ,  유민기

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/7869 ,  H01L29/66742 ,  H01L29/78606

Abstract: PURPOSE: An oxide thin film transistor and a manufacturing method thereof are provided to improve reliability of a photovoltage by forming a diffusion preventing layer which prevents a hole and an ionized oxygen vacancy from moving in a low temperature of 50°C-200°C. CONSTITUTION: A gate electrode(20) is formed on a substrate(10). A gate insulating layer(30) is formed on the upper side of the substrate including the gate electrode. A source electrode(40a) and a drain electrode(40b) are formed on both sides of the gate insulating layer. An active layer(50) and a protective layer(60) are formed on the top of the substrate including a part of the drain electrode and the source electrode. The active layer comprises an oxide semiconductor and a diffusion preventing layer.

Abstract translation: 目的：提供一种氧化物薄膜晶体管及其制造方法，以通过形成防止空穴和电离氧空位在50℃-200℃的低温下移动的扩散防止层来提高光电压的可靠性。 构成：在基板（10）上形成栅电极（20）。 在包括栅电极的基板的上侧形成栅极绝缘层（30）。 源极电极（40a）和漏电极（40b）形成在栅极绝缘层的两侧。 在包括漏电极和源电极的一部分的衬底的顶部上形成有源层（50）和保护层（60）。 有源层包括氧化物半导体和扩散防止层。

公开(公告)号：KR1020120108894A

公开(公告)日：2012-10-05

申请号：KR1020110085561

申请日：2011-08-26

Applicant: 한국전자통신연구원 ,  건국대학교 산학협력단

Inventor： 박상희 ,  황치선 ,  윤성민 ,  오힘찬 ,  박기찬 ,  임도 ,  임홍균 ,  오민우 ,  김지선 ,  피재은 ,  김병훈 ,  유병곤

IPC: H03K19/094 ,  H03K19/20

CPC classification number: H03K19/094 ,  H03K19/00 ,  H03K19/02 ,  H03K19/08 ,  H03K19/20

Abstract: PURPOSE: An inverter, an NAND gate, and an NOR gate are provided to provide a digital logic gate driven in low consumption power equal to power in a CMOS(Complementary Metal-Oxide Semiconductor) circuit by controlling the flow of a current according to an input and output signal. CONSTITUTION: An inverter comprises a pull-up part(210), a pull down part(220), and a pull up drive part(230). The pull-up part is composed of a second TFT(Thin Film Transistor) outputting a first power supply voltage to an output terminal according to a voltage applied to a gate. The pull down part is composed of a fifth TFT outputting a ground voltage to the output terminal according to the input signal voltage applied to the gate. The pull up drive part applies a second power supply voltage or the ground voltage to the gage in a second TFT according to the input signal.

Abstract translation: 目的：提供一个反相器，一个与非门和一个或非门，以通过控制电流的流动来提供在CMOS（互补金属氧化物半导体）电路中等于功率的低功耗驱动的数字逻辑门 输入和输出信号。 构成：逆变器包括上拉部分（210），下拉部分（220）和上拉驱动部分（230）。 上拉部分由根据施加到栅极的电压将第一电源电压输出到输出端的第二TFT（薄膜晶体管）组成。 下拉部分由根据施加到栅极的输入信号电压向输出端输出接地电压的第五TFT组成。 上拉驱动部件根据输入信号将第二电源电压或接地电压施加到第二TFT中的量规。

公开(公告)号：KR1020120062341A

公开(公告)日：2012-06-14

申请号：KR1020100123561

申请日：2010-12-06

Applicant: 한국전자통신연구원

Inventor： 정승묵 ,  정우석 ,  황치선 ,  박상희 ,  조경익

IPC: C23C14/08 ,  C23C14/34

CPC classification number: C23C14/3414 ,  C23C14/086

Abstract: PURPOSE: An IZO(Indium Zinc Oxide) transparent conductive film and a manufacturing method thereof are provided to obtain a thin film with enhanced etching properties and to obtain an amorphous or nano crystalline thin film at low temperatures. CONSTITUTION: An IZO transparent conductive film comprises indium oxide, zinc oxide, and titanium oxide. The IZO transparent conductive film is formed from an IZO sputtering target expressed as the following formula, InxZny(TiO2-a)z, where x+y

Abstract translation: 目的：提供IZO（氧化铟锌）透明导电膜及其制造方法以获得具有增强的蚀刻性能的薄膜，并在低温下获得非晶或纳米晶体薄膜。 构成：IZO透明导电膜包括氧化铟，氧化锌和氧化钛。 IZO透明导电膜由下式表示的IZO溅射靶InxZny（TiO2-a）z形成，其中x + y <= 1，0.0001 <= z <0.002，x：y = 8.5-9.5:1.5 -0.5和0.5 <= a <= 1。

公开(公告)号：KR1020120055173A

公开(公告)日：2012-05-31

申请号：KR1020100116736

申请日：2010-11-23

Applicant: 한국전자통신연구원

Inventor： 변춘원 ,  김병훈 ,  윤성민 ,  양신혁 ,  유민기 ,  황치선 ,  박상희 ,  조경익

IPC: G11C11/22

CPC classification number: G11C11/22 ,  G11C7/10 ,  G11C7/22 ,  G11C11/223 ,  G11C11/2273 ,  G11C11/2275

Abstract: PURPOSE: A memory cell and a memory device using the same are provided to improve stability by preventing an electrode from being floated in a memory array area. CONSTITUTION: A ferroelectric transistor(110) is provided. A plurality of switching devices(111,112,113) are electrically combined with the ferroelectric transistor. A plurality of control lines transmit each control signal for controlling a plurality of switching device to each switching device. The plurality of switching devices are individually controlled based on each control signal to prevent each electrode of the ferroelectric transistor from being floated.

Abstract translation: 目的：提供一种存储单元和使用其的存储器件，以通过防止电极浮在存储器阵列区域来提高稳定性。 构成：提供铁电晶体管（110）。 多个开关器件（111,112,113）与铁电晶体管电气组合。 多个控制线将用于控制多个开关装置的每个控制信号发送到每个开关装置。 基于每个控制信号单独地控制多个开关装置，以防止铁电晶体管的每个电极浮动。

公开(公告)号：KR1020110119963A

公开(公告)日：2011-11-03

申请号：KR1020100039411

申请日：2010-04-28

Applicant: 한국전자통신연구원

Inventor： 유민기 ,  박상희 ,  황치선 ,  조경익

IPC: H01L29/786 ,  G02F1/136

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L29/78648 ,  H01L27/1214 ,  H01L27/3248 ,  H01L27/3262

Abstract: PURPOSE: A semiconductor apparatus and a manufacturing method thereof are provided to arrange an upper gate electrode of a dual gate transistor when arranging a pixel electrode, thereby arranging the dual gate transistor without adding a separate process. CONSTITUTION: A lower gate electrode(120B) is arranged on a substrate(100). An upper gate electrode(180) is arranged on the lower gate electrode. A contact plug is included between the lower gate electrode and upper gate electrode. A function electrode(182) is arranged with the same height as the upper gate electrode. A source electrode(162) and drain electrode(164) are arranged with the same height as the contact plug.

Abstract translation: 目的：提供一种半导体装置及其制造方法，用于在布置像素电极时布置双栅晶体管的上栅电极，从而在不增加单独工艺的情况下布置双栅极晶体管。 构成：下基板电极（120B）布置在基板（100）上。 上栅电极（180）布置在下栅电极上。 在下栅电极和上栅电极之间包括接触插塞。 功能电极（182）以与上部栅极电极相同的高度排列。 源电极（162）和漏电极（164）以与接触插塞相同的高度布置。

公开(公告)号：KR100974887B1

公开(公告)日：2010-08-11

申请号：KR1020070132753

申请日：2007-12-17

Applicant: 한국전자통신연구원

Inventor： 조두희 ,  양신혁 ,  박상희 ,  신재헌 ,  유민기 ,  황치선 ,  조경익 ,  추혜용

IPC: H01L29/786

Abstract: 본 발명은 투명 박막 트랜지스터 및 이의 제조 방법에 관한 것으로, 하부 게이트 구조 투명 박막 트랜지스터의 장기적 안정성을 확보하고 공정 중의 특성 변화를 최소화하며, 박막 트랜지스터의 투명성을 유지하기 위하여 폴리머 물질의 보호막을 비교적 낮은 온도의 공정으로 형성하는 방법을 제공한다.
이를 위하여, 본 발명의 일실시 예에 따른 폴리머 보호막이 형성된 투명 박막 트랜지스터는, 기판; 상기 기판 상에 형성된 게이트 전극; 상기 게이트 전극 상에 형성된 게이트 절연층; 상기 게이트 절연층 상에 형성된 반도체 활성층; 상기 반도체 활성층의 양단에 각각 형성된 소오스 전극 및 드레인 전극; 및 상기 반도체 활성층, 소오스 전극 및 드레인 전극을 덮는 폴리머 물질의 보호막을 포함한다.
폴리머 보호막, 하부 게이트 구조, 투명 박막 트랜지스터

公开(公告)号：KR1020100023187A

公开(公告)日：2010-03-04

申请号：KR1020080081818

申请日：2008-08-21

Applicant: 한국전자통신연구원

Inventor： 조두희 ,  박상희 ,  변춘원 ,  조경익 ,  정승묵 ,  유민기 ,  황치선 ,  추혜용

IPC: C04B35/10 ,  C04B35/453

CPC classification number: C23C14/3407 ,  C04B35/453 ,  C04B35/62615 ,  C04B35/62655 ,  C04B35/632 ,  C04B35/64 ,  C04B2235/3217 ,  C04B2235/3286 ,  C04B2235/3293 ,  C23C14/086

Abstract: PURPOSE: A composition for a sputtering target of an oxide semiconductor thin film, a method for manufacturing the sputtering target, and the sputtering target are provided to obtain a transparent oxide semiconductor film showing high mobility through a low-temperature process less than 300°C. CONSTITUTION: A method for manufacturing a sputtering target comprises the following steps: blending(S11) and crashing raw material powder consisting of aluminum oxide, zinc oxide, and tin oxide; molding(S12) the powder in a desired form; fist calcinating a molding product at 500 - 1000°C; pulverizing and mixing the molding product which is fist calcinated; and molding the mixed powder; sintering(S13) the molding product. Indium oxide is more included in the raw material powder.

Abstract translation: 目的：提供一种用于氧化物半导体薄膜的溅射靶的组合物，溅射靶的制造方法和溅射靶，以获得通过低于300℃的低温工艺显示高迁移率的透明氧化物半导体膜 。 构成：溅射靶的制造方法包括以下步骤：混合（S11）和粉碎由氧化铝，氧化锌和氧化锡组成的原料粉末; （S12）所需形式的粉末; 在500-1000℃煅烧成型产品; 粉碎和混合被锻烧的成型产品; 并成型混合粉末; 烧结（S13）成型品。 氧化铟更多地包含在原料粉末中。

公开(公告)号：KR1020090065268A

公开(公告)日：2009-06-22

申请号：KR1020070132751

申请日：2007-12-17

Applicant: 한국전자통신연구원

Inventor： 황치선 ,  변춘원 ,  박상희 ,  추혜용 ,  조경익

IPC: H04B1/38

CPC classification number: H04M1/0266 ,  H04M1/0216 ,  H04M2250/12 ,  H04M2250/16 ,  H04M2250/18 ,  H04M2250/22

Abstract: A foldable display device using a transparent display is provided to output various images to respective transparent displays, thereby improving user's convenience. A transparent display unit(220) comprises a transparent display(222). The transparent display unit enables switching into a transparent mode transmitting light or a display mode outputting image data. A control unit(210) sets the transparent display in the transparent mode or the display mode based on a signal received during an activation state of a device. A lower panel housing is connected to the transparent display unit to enable folding and unfolding.

Abstract translation: 提供使用透明显示器的可折叠显示装置，以将各种图像输出到相应的透明显示器，从而提高用户的便利性。 透明显示单元（220）包括透明显示器（222）。 透明显示单元能够切换到透明模式透射光或输出图像数据的显示模式。 控制单元（210）基于在设备的激活状态期间接收到的信号，将透明显示器设置为透明模式或显示模式。 下面板壳体连接到透明显示单元以使折叠和展开。

公开(公告)号：KR1020090065182A

公开(公告)日：2009-06-22

申请号：KR1020070132649

申请日：2007-12-17

Applicant: 한국전자통신연구원

Inventor： 조두희 ,  변춘원 ,  신재헌 ,  박상희 ,  황치선 ,  추혜용

IPC: H05B33/02 ,  G06F3/03

CPC classification number: H01L27/323

Abstract: An organic light-emitting diode touch screen device and a manufacturing method thereof are provided to ensure a thin organic light-emitting diode touch screen device and to simplify a manufacturing process by using an infrared sensor. An organic light-emitting diode touch screen device comprises a display light-emitting unit and a touch sensing unit. The display light-emitting unit(200) includes a thin film transistor and an organic light-emitting diode controlled by the thin film transistor. The touch sensing unit(210) includes an infrared sensor and an infrared filter filtering and transmitting only infrared signals generated in the infrared sensor. The display light-emitting unit is arranged on the planar surface of the organic light-emitting diode touch screen device. The touch sensing unit is arranged between the display light-emitting units evenly.

Abstract translation: 提供一种有机发光二极管触摸屏装置及其制造方法，以确保薄的有机发光二极管触摸屏装置，并且通过使用红外传感器简化制造工艺。 有机发光二极管触摸屏装置包括显示发光单元和触摸感测单元。 显示发光单元（200）包括薄膜晶体管和由薄膜晶体管控制的有机发光二极管。 触摸感测单元（210）包括红外传感器和红外滤光器，其仅对红外传感器中产生的红外信号进行滤波和透射。 显示发光单元设置在有机发光二极管触摸屏装置的平面上。 触摸感测单元均匀地布置在显示发光单元之间。

公开(公告)号：KR1020080065517A

公开(公告)日：2008-07-14

申请号：KR1020070057097

申请日：2007-06-12

Applicant: 한국전자통신연구원

Inventor： 박상희 ,  황치선 ,  추혜용 ,  이정익

IPC: H01L21/203 ,  H01L21/205 ,  H01L29/786

CPC classification number: H01L21/02554 ,  H01L21/20 ,  H01L29/7869

Abstract: A method for fabricating a p-type ZnO semiconductor layer is provided to form a thin film transistor including a p-type ZnO semiconductor layer on a large-area glass or plastic substrate and eliminate the necessity of a high temperature post-treatment by forming a p-type ZnO semiconductor layer by an ALD(atomic layer deposition) method. A substrate is disposed in a chamber(S101). A zinc precursor and an oxygen precursor are injected into the chamber, and a ZnO thin film is formed on the substrate by a surface chemical reaction of the zinc precursor and the oxygen precursor while using an ALD method(S104). A zinc precursor and a nitrogen precursor are injected into the chamber, and a doping layer is formed on the ZnO thin film by using a surface chemical reaction of the zinc precursor and the nitrogen precursor. The zinc precursor can be diethyl zinc or dimethyl zinc. The oxygen precursor can be made of one of water, ozone, oxygen, water plasma or oxygen plasma.

Abstract translation: 提供一种制造p型ZnO半导体层的方法，以在大面积玻璃或塑料基板上形成包括p型ZnO半导体层的薄膜晶体管，并且通过形成 p型ZnO半导体层通过ALD（原子层沉积）法。 衬底设置在腔室中（S101）。 将锌前体和氧前体注入到室中，并且通过使用ALD方法的锌前体和氧前体的表面化学反应在基板上形成ZnO薄膜（S104）。 将锌前体和氮前体注入到室中，并且通过使用锌前体和氮前体的表面化学反应在ZnO薄膜上形成掺杂层。 锌前体可以是二乙基锌或二甲基锌。 氧气前体可以由水，臭氧，氧气，水等离子体或氧等离子体中的一种制成。