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公开(公告)号：KR1019940004262B1
公开(公告)日：1994-05-19
申请号：KR1019900021813
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L21/335
Abstract: preparing a GaAs substrate; depositing a Si layer on the substrate; forming a first photoresist pattern on the Si layer; etching the Si layer using the first photoresist pattern as a mask to define ohmic contact regions of source/drain electrodes; forming a second photoresist pattern on the substrate after removal of the first photoresist pattern to define a channel region and injecting a predetermined quantity of Si ions into the substrate; depositing a protective layer around the substrate after removal of the second photoresist pattern; and annealing the substrate to activate Si ions of the remaining Si layer and diffusing the activating Si ions into the deep direction of the substrate.
Abstract translation: 制备GaAs衬底; 在衬底上沉积Si层; 在所述Si层上形成第一光刻胶图案; 使用第一光致抗蚀剂图案作为掩模蚀刻Si层以限定源/漏电极的欧姆接触区域; 在去除第一光致抗蚀剂图案之后在衬底上形成第二光致抗蚀剂图案以限定沟道区域并将预定量的Si离子注入到衬底中; 在除去第二光致抗蚀剂图案之后，在衬底周围沉积保护层; 并且使衬底退火以激活剩余Si层的Si离子并将活化Si离子扩散到衬底的深度方向。
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公开(公告)号：KR1019920003827B1
公开(公告)日：1992-05-15
申请号：KR1019890011896
申请日：1989-08-21
Applicant: 한국전자통신연구원
IPC: H01L21/66
Abstract: In a measuring method for speading resistance and impurity concentration of semiconductor board, two probes measure spreading resistance downwardly of a semicomductor board on a slope of an angle of inclination. Impurity concentration is known from the spreading resistance mearsured. For two dimensional measurement spreading resistance is measured on a slope of angles of inclination in the planes of X-Y and X-Z.
Abstract translation: 在半导体板的电阻和杂质浓度的测定方法中，两个探针在倾斜角度的斜率上测量半导体板向下的扩展电阻。 杂质浓度从扩散阻力已知。 对于二维测量，在X-Y和X-Z的平面中的倾斜角度的斜率上测量扩展电阻。
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Patent Agency Ranking
公开(公告)号：KR1019920002517B1
公开(公告)日：1992-03-27
申请号：KR1019890004487
申请日：1989-04-04
Applicant: 한국전자통신연구원
IPC: H01L21/304
Abstract: An insulating layer (4) is selectively deposited on a semi- insulated GaAs substrate (1) on which a buried p type and n+ type layers (3)(8) are formed. The first and second side walls (7)(9) are formed between gate, drain and source and are in contact with the insulating layer (4). An AuGe/Ni layer (11) is formed on the source and drain regions in contact with the n+ type layer (8), while a Ti/Pt/Au gate metal (10) is formed on the gate region. Over the layers an insulating layer (13) and metallic lines (14) are formed in the cited order, and thus, the length of the gate is shortened by providing dual side walls, thereby improving the speed characteristics and reducing noise.
Abstract translation: 在半绝缘GaAs衬底（1）上选择性地沉积绝缘层（4），在其上形成掩埋p型和n +型层（3）（8）。 第一和第二侧壁（7）（9）形成在栅极，漏极和源极之间并且与绝缘层（4）接触。 在与n +型层（8）接触的源极和漏极区域上形成AuGe / Ni层（11），而在栅极区域上形成Ti / Pt / Au栅极金属（10）。 在这些层上，以引用的顺序形成绝缘层（13）和金属线（14），因此，通过提供双侧壁来缩短栅极的长度，从而提高速度特性并降低噪声。
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公开(公告)号：KR100116428B1
公开(公告)日：1997-06-16
申请号：KR1019930026788
申请日：1993-12-08
Applicant: 한국전자통신연구원
IPC: H01L21/027
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公开(公告)号：KR1019970004477B1
公开(公告)日：1997-03-28
申请号：KR1019930026788
申请日：1993-12-08
Applicant: 한국전자통신연구원
IPC: H01L21/027
Abstract: A method of fabricating an inductor of a GaAs compound semiconductor integrate circuit includes the first step of forming an inductor shape in a second exposed layer 7 formed on a substrate 1, depositing double metal layers 8 thereon, and forming a final inductor shape in a third exposed layer 9, the second step of dipping the substrate into a plating solution to grow a gold line through electric plating, removing the third exposed layer 9 using plasma 13 mixed of oxygen and helium, and removing the double metal layers 8, and third step of removing the second exposed layer 7 to form an inductor. A method of forming a contact hole includes the first step of depositing a nitride layer 2 on a substrate 1 and forming a first exposed layer 3, the second step of removing the surface remnants of the exposed layer using plasma mixed of oxygen and helium in the vacuum, and third step of forming a contact hole 5 penetrating two metal layers.
Abstract translation: 一种制造GaAs化合物半导体集成电路的电感器的方法包括在形成于基板1上的第二暴露层7中形成电感器形状的第一步骤，在其上沉积双金属层8，并在第三层中形成最终的电感器形状 将基板浸入电镀溶液中以通过电镀生长金线的第二步骤，使用混合氧和氦的等离子体13除去第三暴露层9，并除去双金属层8，第三步骤 去除第二暴露层7以形成电感器。 形成接触孔的方法包括在衬底1上沉积氮化物层2并形成第一暴露层3的第一步骤，第二步骤是使用在氧和氦中混合的等离子体来除去暴露层的表面残留物 真空和形成穿过两个金属层的接触孔5的第三步骤。
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公开(公告)号：KR100110351B1
公开(公告)日：1997-01-09
申请号：KR1019920025024
申请日：1992-12-22
Applicant: 한국전자통신연구원
IPC: H01L21/447
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公开(公告)号：KR1019960013625B1
公开(公告)日：1996-10-10
申请号：KR1019920025024
申请日：1992-12-22
Applicant: 한국전자통신연구원
IPC: H01L21/447
Abstract: a cover(12a) with a handle(12d) to lift the vacuum container; a main vacuum chamber(12) that is formed under the cover(12a); a deposition tub(13); a lower tub(12b) where a contact stand(13b) for connecting and fixing the deposition tub is provided; a sample piece plate(14); means(14b and 15), for moving the sample piece plate upward and downward mounted on the cover(12a), with a raising stand(14b) and a raising handle(15); a rotation driving means(15a) for rotating the sample piece plate(14); and an auxiliary vacuum chamber(12c) having a lid(28) and a nitrogen inlet(24) formed thereon, and a handle to move the deposition tub(13) and sample piece plate(14) right and left.
Abstract translation: 具有提升真空容器的手柄（12d）的盖（12a）; 形成在所述盖（12a）下方的主真空室（12）; 沉积浴缸（13）; 提供用于连接和固定沉积槽的接触支架（13b）的下部桶（12b）; 样品片（14）; 用于通过升高支架（14b）和升高手柄（15）将样品板上下移动安装在盖（12a）上的装置（14b和15）; 用于旋转样品片（14）的旋转驱动装置（15a）; 以及具有形成在其上的盖（28）和氮气入口（24）的辅助真空室（12c）和用于使沉积槽（13）和样品板（14）左右移动的手柄。
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