Abstract:
The probe card assembly (500) includes a probe card (502), and a space transformer (506) having resilient contact structures (524) mounted to and extending from terminals (522) on its surface. An interposer (504) is disposed between the space transformer and the probe card. The space transformer and interposer are stacked on the probe card and the resilient contact structures can be arranged to optimise probing of entire wafer.
Abstract:
Contact tip structures are fabricated on sacrificial substrates for subsequent joining to interconnection elements including composite interconnection elements, monolithic interconnection elements, tungsten needles of probe cards, contact bumps of membrane probes, and the like. The spatial relationship between the tip structures can lithographically be defined to very close tolerances. The metallurgy of the tip structures is independent of that of the interconnection element to which they are attached, by brazing, plating or the like. The contact tip structures are readily provided with topological (small, precise, projecting, non-planar) contact features, such as in the form of truncated pyramids, to optimize electrical pressure connections subsequently being made to terminals of electronic components. Elongate contact tip structures, adapted in use to function as spring contact elements without the necessity of being joined to resilient contact elements are described. Generally, the invention is directed to making (pre-fabricating) relatively 'perfect' contact tip structures ('tips') and joining them to relatively 'imperfect' interconnection elements to improve the overall capabilities of resulting 'tipped' interconnection elements.
Abstract:
The probe card assembly (500) includes a probe card (502), and a space transformer (506) having resilient contact structures (524) mounted to and extending from terminals (522) on its surface. An interposer (504) is disposed between the space transformer and the probe card. The space transformer and interposer are stacked on the probe card and the resilient contact structures can be arranged to optimise probing of entire wafer.
Abstract:
Microelectronic contact structures (260, 360, 460) are lithographically defined and fabricated by applying a masking layer (220, 320, 420) on a surface of a substrate (202, 302, 402) such as an electronic component, creating an opening (222, 322, 422) in the masking layer, depositing a conductive trace of a seed layer (250, 350, 450) onto the masking layer and into the openings, and building up a mass of conductive material on the conductive trace. The sidewalls of the opening can be sloped (tapered). The conductive trace can be patterned by depositing material through a stencil or shadow mask (240, 340, 440). A protruding feature (230, 430) may be disposed on the masking layer so that a tip end (264, 364, 464) of the contact structure acquires a topography. All of these elements can be constructed as a group to form a plurality of precisely positioned resilient contact structures.
Abstract:
A plurality of contact elements, such as contact bumps or free-standing spring contacts (710) including both monolithic and composite interconnection elements, are mounted to relatively small tile substrates (702) which, in turn, are mounted and connected to a relatively large electronic component substrate (706), thereby populating the electronic component with a plurality of contact elements while avoiding the necessity of yielding the contact elements directly upon the electronic component. The relatively large electronic component is suitably a space transformer component of a probe card assembly. In this manner, pressure connections can be made to an entire semiconductor wafer, at once, to provide for wafer-level bum-in, and the like. Solder balls, z-axis conductive adhesive, or compliant connections are suitably employed for making electrical connections between the tile substrates and the electronic component. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the tiles can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described. Techniques for maintaining a prescribed x-y and z-axis alignment of the tiles to the relatively large substrate are disclosed.
Abstract:
Interconnection elements (752) and/or tip structures (770) for interconnection elements (752) may first be fabricated upon sacrificial substrates (702) for subsequent mounting to electronic components (784). In this manner, the electronic components (784) are not 'at risk' during the fabrication process. The sacrificial substrate (702) establishes a predetermined spatial relationship between the interconnection elements (752) which may be composite interconnection elements (752) having a relatively soft elongate element (752) as a core and a relatively hard (springy material) overcoat (754). Interconnection elements (752) may be fabricated upon tip structures (770), or may first be mounted to the electronic component (784) and the tip structures (770) joined to the free-ends of the interconnection elements (752). Tip structures (770) formed as cantilever beams are described.
Abstract:
Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic component such as an active semiconductor device. Each spring contact element has a base end, a contact end, and a central body portion. The contact end is offset in the z-axis (at a different height) and in at least one of the x and y directions from the base end. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the substrate. The spring contact elements make temporary (i.e., pressure) or permanent (e.g., joined by soldering or brazing or with a conductive adhesive) connections with terminals of another electronic component to effect electrical connections therebetween. In an exemplary application, the spring contact elements are disposed on semiconductor devices resident on a semiconductor wafer so that temporary connections can be made with the semiconductor devices to burn-in and/or test the semiconductor devices.
Abstract:
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact element effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs. A significant reduction in interconnect count and consequent simplification of the interconnection substrate is realized because the ASICs are capable of receiving a plurality of signals for testing the DUTs over relatively few signal lines from a host controller and promulgating these signals over the relatively many interconnections between the ASICs and the DUTs. The ASICs can also generate at least a portion of these signals in response to control signals from the host controller. Physical alignment techniques are also described. Micromachined indentations on the front surface of the ASICs ensure capturing free ends of the spring contact elements. Micromachined features on the back surface of the ASICs and the front surface of the interconnection substrate to which they are mounted facilitate precise alignment of a plurality of ASICs on the support substrate.
Abstract:
Products and assemblies are provided for socketably receiving elongate interconnection elements, such as spring contact elements, extending from electronic components, such as semiconductor devices. Socket substrates are provided with capture pads for receiving ends of elongate interconnection elements extending from electronic components. Various capture pad configurations are disclosed. A securing device such as a housing positions the electronic component securely to the socket substrate. Connections to external devices are provided via conductive traces adjacent the surface of the socket substrate. The socket substrate may be supported by a support substrate. In a particularly preferred embodiment the capture pads are formed directly on a primary substrate such as a printed circuit board.
Abstract:
Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic component such as an active semiconductor device. Each spring contact element has a base end, a contact end, and a central body portion. The contact end is offset in the z-axis (at a different height) and in at least one of the x and y directions from the base end. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the substrate. The spring contact elements make temporary (i.e., pressure) or permanent (e.g., joined by soldering or brazing or with a conductive adhesive) connections with terminals of another electronic component to effect electrical connections therebetween. In an exemplary application, the spring contact elements are disposed on semiconductor devices resident on a semiconductor wafer so that temporary connections can be made with the semiconductor devices to burn-in and/or test the semiconductor devices.