公开(公告)号：DE59607727D1

公开(公告)日：2001-10-25

申请号：DE59607727

申请日：1996-06-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOFMANN FRANZ ,  ROESNER WOLFGANG ,  KRAUTSCHNEIDER WOLFGANG ,  RISCH LOTHAR

IPC: H01L21/8247 ,  H01L27/115 ,  H01L27/11517 ,  H01L29/788 ,  H01L29/792

Abstract: PCT No. PCT/DE96/01117 Sec. 371 Date Dec. 8, 1997 Sec. 102(e) Date Dec. 8, 1997 PCT Filed Jun. 25, 1996 PCT Pub. No. WO97/02599 PCT Pub. Date Jan. 23, 1997An electrically writable and erasable read-only memory cell arrangement fabricated in a semiconductor substrate, preferably of monocrystalline silicon, or in a silicon layer of an SOI substrate. A cell array with memory cells is provided on a main surface of the semiconductor substrate. Each memory cell comprises an MOS transistor, vertical to the main surface and comprising, in addition to the source/drain region and a channel region arranged in-between, a first dielectric, a floating gate, a second dielectric and a control gate. A plurality of essentially parallel strip-shaped trenches are provided in the cell array. The vertical MOS transistors are arranged on the flanks of the trenches. The memory cells are in each case arranged on opposite flanks of the trenches.

公开(公告)号：DE19942692A1

公开(公告)日：2001-04-12

申请号：DE19942692

申请日：1999-09-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHULZ THOMAS ,  ROESNER WOLFGANG ,  RISCH LOTHAR

IPC: H01L27/14 ,  H01L27/144 ,  H01L27/15 ,  H01L31/0232 ,  H01L31/10 ,  H01L31/102 ,  G02B6/42

Abstract: In an integrated optoelectronic microelectronic system, an optoelectronically active diode part is formed in a semiconductor substrate by zones forming depletion layers. The system is provided in a mesa that stands vertically on a semiconductor substrate and runs in a direction of extension thereof. A light waveguide is optically coupled to the diode part in such a way that light is coupled into the diode part via the mesa side wall.

公开(公告)号：DE19940362A1

公开(公告)日：2001-04-12

申请号：DE19940362

申请日：1999-08-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUSTIG BERNHARD ,  SCHAEFER HERBERT ,  RISCH LOTHAR

IPC: H01L29/78 ,  H01L21/335 ,  H01L21/74 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10 ,  H01L21/336

Abstract: Metal oxide semiconductor transistor comprises: sink doped with a first conductivity type in semiconductor substrate; epitaxial layer arranged in sink surface and having doping concentration of less than 10 cm ; and source/drain regions of second conductivity type and a channel region arranged in epitaxial layer. Depth of source/drain regions is less than or equal to epitaxial layer thickness. An Independent claim is also included for a process for the production of the metal oxide semiconductor (MOS) transistor comprising: producing a sink doped with a first conductivity type in the semiconductor substrate; growing an epitaxial layer on the surface of the sink; producing a gate dielectric on the surface of the epitaxial layer; forming a gate electrode on the surface of the gate dielectric; and producing source/drain regions doped with second conductivity type in the epitaxial layer.