公开(公告)号：WO2004032193A3

公开(公告)日：2005-01-27

申请号：PCT/US0330721

申请日：2003-09-30

Applicant: NANOSYS INC

Inventor： DUAN XIANGFENG ,  NIU CHUNMING ,  EMPEDOCLES STEPHEN ,  ROMANO LINDA T ,  CHEN JIAN ,  SAHI VIJENDRA ,  BOCK LAWRENCE ,  STUMBO DAVID ,  PARCE J WALLACE ,  GOLDMAN JAY L

IPC: C01B31/02 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H01L33/20 ,  H01L41/18 ,  H01L41/22 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y25/00 ,  H01F1/0072 ,  H01L27/1214 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L33/08 ,  H01L33/18 ,  H01L35/26 ,  H01L35/32 ,  H01L41/082 ,  H01L41/18 ,  H01L41/316 ,  H01L51/0012 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0508 ,  H01L51/0545 ,  H01L51/0595 ,  Y02E10/549

Abstract: A method and apparatus for an electronic substrate (1920) having a plurality of semiconductor devices is described. A thin film of nanowires (1910) is formed on a substrate. The thin film of nanowires (1910) is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions is defined in the thin film of nanowires. Contacts (1902) are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Abstract translation: 描述了具有多个半导体器件的电子基板（1920）的方法和装置。 在衬底上形成纳米线薄膜（1910）。 纳米线薄膜（1910）形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域处形成触点（1902），从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p掺杂纳米线和n掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上定位纳米线的流动掩模，用于沉积纳米线的纳米线喷涂技术，用于减少或消除声子的技术 描述了纳米线中的电子散射，以及用于降低纳米线中的表面状态的技术。

公开(公告)号：WO2007030126A3

公开(公告)日：2009-04-16

申请号：PCT/US2005037237

申请日：2005-10-14

Applicant: NANOSYS INC ,  MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  LEON FRANCISCO ,  PAN YAOLING ,  ROMANO LINDA T

Inventor： MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  LEON FRANCISCO ,  PAN YAOLING ,  ROMANO LINDA T

IPC: H01L29/775

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78645 ,  H01L29/78681 ,  H01L29/7869 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/938

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one snowier; a gate contact is positioned along part of the length of the snowier, and a dielectric material layer is between the gate contact and the at least one snowier. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the snowier length. In another aspect, an electronic device includes a snowier having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the snowier along a portion of the length of the snowier. A second gate region is positioned along the length of the snowier between the snowier and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the snowier at respective exposed portions of the semiconductor core.

Abstract translation: 描述了具有改进的门结构的电子设备的方法，系统和装置。 电子设备包括至少一个雪地; 栅极接触沿着雪的长度的一部分定位，并且介电材料层位于栅极接触和至少一个雪层之间。 源触点和/或漏极触点的至少一部分沿着雪长度与栅极触点重叠。 另一方面，电子设备包括具有由绝缘壳层包围的半导体芯体的雪地机。 环形的第一栅极区域沿着雪橇长度的一部分包围雪橇。 第二栅极区域沿雪层和衬底之间的雪层的长度定位。 源极触点和漏极触点在半导体芯的相应的暴露部分处耦合到雪的半导体芯。

公开(公告)号：WO03085700A2

公开(公告)日：2003-10-16

申请号：PCT/US0309827

申请日：2003-04-01

Applicant: NANOSYS INC ,  EMPEDOCLES STEPHEN ,  BOCK LARRY ,  CHOW CALVIN ,  DUAN XIANFENG ,  NIU CHUNGMING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  ROMANO LINDA T ,  STUMBO DAVID

Inventor： EMPEDOCLES STEPHEN ,  BOCK LARRY ,  CHOW CALVIN ,  DUAN XIANFENG ,  NIU CHUNGMING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: B81C99/00 ,  C23F1/00 ,  H01L51/30 ,  H01L51/40 ,  H01L

CPC classification number: H01L51/0048 ,  B01J23/52 ,  B81B2203/0361 ,  B81B2207/015 ,  B81C3/005 ,  B81C99/008 ,  B81C2203/057 ,  B82B3/00 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G11B5/743 ,  G11C2213/81 ,  H01L29/7869 ,  H01L51/0001 ,  H01L51/0595 ,  H01L2924/0002 ,  Y10S438/962 ,  Y10S977/762 ,  Y10S977/856 ,  Y10S977/857 ,  Y10S977/858 ,  Y10S977/89 ,  H01L2924/00

Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.

Abstract translation: 提供了将纳米结构组装成功能元件如结，阵列和器件的纳米结构制造方法和方法。 还提供了实施方法的系统。

公开(公告)号：WO2005030636A3

公开(公告)日：2007-05-18

申请号：PCT/US2004030234

申请日：2004-09-15

Applicant: NANOSYS INC ,  DUBROW ROBERT ,  ROMANO LINDA T ,  STUMBO DAVID

Inventor： DUBROW ROBERT ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: C01B31/00 ,  B29C51/00 ,  B82B20060101 ,  C30B7/00 ,  C30B21/02 ,  C30B28/06 ,  H01L21/00 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02422 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  C30B7/00 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02656 ,  Y10S977/762 ,  Y10S977/827

Abstract: Methods and systems for depositing nanornaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanornaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.

Abstract translation: 用于将纳米材料沉积到接收衬底上并任选地以期望取向沉积那些材料的方法和系统，其包括在转移衬底上提供纳米材料并使纳米材料与设置在接收衬底的表面或表面的部分上的粘附材料接触 。 可选地通过在传送过程中相对于彼此移动传送和接收基板来提供取向。

公开(公告)号：WO2006078281A2

公开(公告)日：2006-07-27

申请号：PCT/US2005014922

申请日：2005-04-29

Applicant: NANOSYS INC ,  ROMANO LINDA T ,  CHEN JIAN ,  DUAN XIANGFENG ,  DUBROW ROBERT S ,  EMPEDOCLES STEPHEN A ,  GOLDMAN JAY L ,  HAMILTON JAMES M ,  HEALD DAVID L ,  LEMMI FRANCESCO ,  NIU CHUNMING ,  PAN YAOLING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  SCHER ERIK C ,  STUMBO DAVID P ,  WHITEFORD JEFFERY A

Inventor： ROMANO LINDA T ,  CHEN JIAN ,  DUAN XIANGFENG ,  DUBROW ROBERT S ,  EMPEDOCLES STEPHEN A ,  GOLDMAN JAY L ,  HAMILTON JAMES M ,  HEALD DAVID L ,  LEMMI FRANCESCO ,  NIU CHUNMING ,  PAN YAOLING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  SCHER ERIK C ,  STUMBO DAVID P ,  WHITEFORD JEFFERY A

IPC: H01L21/20

CPC classification number: C30B29/605 ,  B82Y10/00 ,  C30B11/12 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0048 ,  Y10S977/762 ,  Y10S977/938 ,  Y10T428/139 ,  Y10T428/2902 ,  Y10T428/2949

Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

Abstract translation: 本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。 本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。 本发明还提供了将纳米线整合到电子器件中的方法，其包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆柱体以将纳米线沉积到表面上。 还提供了使用喷墨打印机或用于对准纳米线的孔以沉积纳米线的方法。 本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。 提供了收集和集成纳米线的其他方法。

公开(公告)号：WO2005017962A3

公开(公告)日：2006-01-26

申请号：PCT/US2004025064

申请日：2004-08-04

Applicant: BURETEA MIHAI ,  CHEN JIAN ,  CHOW CALVIN ,  NIU CHUNMING ,  PAN YAOLING ,  PARCE J WALLACE ,  ROMANO LINDA T ,  STUMBO DAVID ,  NANOSYS INC

Inventor： BURETEA MIHAI ,  CHEN JIAN ,  CHOW CALVIN ,  NIU CHUNMING ,  PAN YAOLING ,  PARCE J WALLACE ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: D02G3/00 ,  H01L21/336 ,  H01L21/44 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L33/06 ,  H01L33/24 ,  H01L51/00 ,  H01L51/05 ,  D01F9/12 ,  H01G4/32 ,  H01L29/78

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78681 ,  H01L29/78696 ,  H01L33/06 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0545 ,  H01L2924/0002 ,  Y10T428/2913 ,  H01L2924/00

Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate (602) having nanowires (606) attached to a portion (604) of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally comprises separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.

公开(公告)号：EP1663853A4

公开(公告)日：2011-06-22

申请号：EP04784184

申请日：2004-09-15

Applicant: NANOSYS INC

Inventor： DUBROW ROBERT ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: B82B1/00 ,  B82B20060101 ,  C30B7/00 ,  C30B21/02 ,  C30B28/06 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02422 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  C30B7/00 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02656 ,  Y10S977/762 ,  Y10S977/827

公开(公告)号：EP1547139A4

公开(公告)日：2009-08-26

申请号：EP03776200

申请日：2003-09-30

Applicant: NANOSYS INC

Inventor： DUAN XIANGFENG ,  NIU CHUNMING ,  EMPEDOCLES STEPHEN ,  ROMANO LINDA T ,  CHEN JIAN ,  SAHI VIJENDRA ,  BOCK LAWRENCE ,  STUMBO DAVID ,  PARCE J WALLACE ,  GOLDMAN JAY L

IPC: C01B31/02 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H01L33/20 ,  H01L41/18 ,  H01L41/22 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y25/00 ,  H01F1/0072 ,  H01L27/1214 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L33/08 ,  H01L33/18 ,  H01L35/26 ,  H01L35/32 ,  H01L41/082 ,  H01L41/18 ,  H01L41/316 ,  H01L51/0012 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0508 ,  H01L51/0545 ,  H01L51/0595 ,  Y02E10/549

Abstract: A method and apparatus for an electronic substrate (1920) having a plurality of semiconductor devices is described. A thin film of nanowires (1910) is formed on a substrate. The thin film of nanowires (1910) is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions is defined in the thin film of nanowires. Contacts (1902) are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：EP1620256A4

公开(公告)日：2013-09-25

申请号：EP04751402

申请日：2004-05-05

Applicant: NANOSYS INC

Inventor： DUBROW ROBERT ,  DANIELS HUGH ,  PARCE J WALLACE ,  MURPHY MATTHEW ,  HAMILTON JIM ,  SCHER ERIK ,  STUMBO DAVE ,  NIU CHUNMING ,  ROMANO LINDA T ,  GOLDMAN JAY ,  SAHI VIJENDRA ,  WHITEFORD JEFFERY A

IPC: B32B5/16 ,  B01J20/28 ,  B01J20/32 ,  B81B3/00 ,  C01B20060101 ,  C12N15/87 ,  D04H3/00 ,  D04H5/00 ,  D04H13/00 ,  H01J49/00 ,  H01J49/04

CPC classification number: C12N15/87 ,  B01J20/28007 ,  B01J20/3242 ,  B01J2220/54 ,  B81B3/0089 ,  B82Y5/00 ,  B82Y30/00 ,  H01J49/0418

Abstract: This invention provides novel nanofiber enhanced surface area substrates and structures comprising such substrates, as well as methods and uses for such substrates.

公开(公告)号：EP1522106A4

公开(公告)日：2009-12-16

申请号：EP03718122

申请日：2003-04-01

Applicant: NANOSYS INC

Inventor： EMPEDOCLES STEPHEN ,  BOCK LARRY ,  CHOW CALVIN ,  DUAN XIANFENG ,  NIU CHUNGMING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: B81C99/00 ,  C23F1/00 ,  H01L51/30 ,  H01L51/40 ,  H01L31/0312 ,  H01J1/30 ,  H01L21/00

CPC classification number: H01L51/0048 ,  B01J23/52 ,  B81B2203/0361 ,  B81B2207/015 ,  B81C3/005 ,  B81C99/008 ,  B81C2203/057 ,  B82B3/00 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G11B5/743 ,  G11C2213/81 ,  H01L29/7869 ,  H01L51/0001 ,  H01L51/0595 ,  H01L2924/0002 ,  Y10S438/962 ,  Y10S977/762 ,  Y10S977/856 ,  Y10S977/857 ,  Y10S977/858 ,  Y10S977/89 ,  H01L2924/00