公开(公告)号：MY114796A

公开(公告)日：2003-01-31

申请号：MYPI9603598

申请日：1996-08-29

Applicant: QUALCOMM INC

Inventor： PITTA THOMAS A ,  WEILAND ANA L ,  PETERZELL PAUL E ,  WALLACE RAYMOND C ,  KORNFELD RICHARD K

IPC: H01Q1/50 ,  H01P1/213 ,  H03H7/46 ,  H04B1/40

Abstract: A DUAL-BAND ANTENNA SYSTEM FOR USE IN A PORTABLE COMMUNICATIONS DEVICE IS DISCLOSED HEREIN. THE ANTENNA SYSTEM INCLUDES AN ANTENNA ELEMENT FOR RADIATING ELECTROMAGNETIC ENERGY WITHIN LOW-BAND AND HIGH-BAND WAVELENGTH RANGES. IN A PREFERRED EMBODIMENT, A LOW-BAND ISOLATOR NETWORK, COUPLED TO THE ANTENNA ELEMENT, PROVIDES SIGNAL ISOLATION BETWEEN HIGH-BAND AND LOW-BAND SIGNAL PATHS DURING HIGH-BAND OPERATION. SIMILARLY, A HIGH-BAND ISOLATOR NETWORK PROVIDES SIGNAL ISOLATION, DURING OPERATION OVER THE LOW-BAND RANGE OF WAVELENGTHS, BETWEEN THE HIGH-BAND AND LOW-BAND SIGNAL PATHS. DURING TRANSMIT AND RECEIVE OPERATION, LOW-BAND AND HIGH-BAND ELELCTROMAGNETIC ENERGY DIRECTED THROUGH THE ANTENNA IS PASSED BY THE LOW-BAND AND HIGH-BAND ISOLATOR NETWORKS, RESPECTIVELY. ALSO INCLUDED ARE LOW-BAND AND HIGH-BAND MATCHING NETWORKS WHICH COUPLE THE LOW-BAND AND HIGH-BAND ISOLATOR NETWORKS TO LOW-BAND AND HIGH-BAND TRANSCEIVER CIRCUITRY.

公开(公告)号：CA2163883C

公开(公告)日：2003-01-28

申请号：CA2163883

申请日：1995-04-28

Applicant: QUALCOMM INC

Inventor： WILSON NATHANIEL B ,  BLACK PETER J ,  PETERZELL PAUL E

IPC: H03G3/20 ,  H03D3/00 ,  H03D3/24 ,  H03D7/16 ,  H03G3/30 ,  H04B1/30 ,  H04L27/14 ,  H04L27/22

Abstract: An automatic gain control (AGC) and D.C. offset correction method and appara tus for controlling signal power of a received RF signal within a dual mode quadrature receiver is disclosed herein. The AGC a pparatus includes an adjustable gain amplifier (18). A quadrature downconverter (20) coupled to the amplifier (18) serves to transl ate the frequency of the output signal to a baseband fre quency which is offset by a predetermined margin from D.C. Two high gain active low pass filters (76 and 78) provide out-of-band signal reje ction for the baseband signals. A D.C. feedthrough suppression loop supresses D.C. offsets produced by a downconverter (20) and the lowpas s filters (76 and 78). The AGC apparatus also generates a received power signa l based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and prod uces the gain control signal by integrating or by refrai ning from integration based on values of the reference, received power signal, an d gain control signals.

公开(公告)号：RU2196384C2

公开(公告)日：2003-01-10

申请号：RU97111882

申请日：1995-12-11

Applicant: QUALCOMM INC

Inventor： WHEATLEY CHARLES E III ,  PETERZELL PAUL E ,  KORNFELD RICHARD K ,  WEILAND ANA L

IPC: H04B1/06 ,  H03G1/00 ,  H03G3/30 ,  H04B20060101 ,  H04B1/10 ,  H04B1/16 ,  H04B1/18 ,  H04B1/40 ,  H04B1/7075 ,  H04B1/7097 ,  H04B3/06 ,  H04B7/005 ,  H04B7/26 ,  H04B15/00

Abstract: FIELD: radio communications. SUBSTANCE: power level of received signal is determined in all design alternates and if this level is equal to or higher than predetermined threshold value, received- signal amplifier gain is controlled in radio receiver. Amplifier gain is controlled either by shorting out the amplifier or by continuously controlling its gain. Continuous gain control enables noise suppression and matching of radio receiver sensitivity at lower levels of signal than those in shorted-out amplifier. EFFECT: enhanced noise immunity. 10 cl, 15 dwg

公开(公告)号：CA2723058A1

公开(公告)日：2002-08-29

申请号：CA2723058

申请日：2002-02-15

Applicant: QUALCOMM INC

Inventor： LI TAO ,  HOLENSTEIN CHRISTIAN ,  KANG INYUP ,  WALKER BRETT C ,  PETERZELL PAUL E ,  CHALLA RAGHU ,  SEVERSON MATTHEW L ,  RAGHUPATHY ARUN ,  SIH GILBERT C

IPC: H03G1/00 ,  H04B1/30 ,  H03D9/00 ,  H03G3/20 ,  H03G3/30 ,  H04L25/06 ,  H04L27/22 ,  H04L27/38

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

公开(公告)号：CA2438333A1

公开(公告)日：2002-08-29

申请号：CA2438333

申请日：2002-02-15

Applicant: QUALCOMM INC

Inventor： HOLENSTEIN CHRISTIAN ,  SEVERSON MATTHEW L ,  LI TAO ,  PETERZELL PAUL E ,  CHALLA RAGHU ,  WALKER BRETT C ,  KANG INJUP

IPC: H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04L27/22 ,  H04L27/38 ,  H03F3/68

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide ga in control for the DVGA and RF/analog circuitry, and a serial bus interface (SB I) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode o f the DC loop, since these two loops interact with one another. The duration o f time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

公开(公告)号：HK1035967A1

公开(公告)日：2001-12-14

申请号：HK01106526

申请日：2001-09-14

Applicant: QUALCOMM INC

Inventor： PETERZELL PAUL E

IPC: H01M10/44 ,  H02H3/12 ,  H02H7/18 ,  H02H11/00 ,  H02J7/00 ,  H02J

Abstract: A battery protection circuit for an external battery pack has a switch for controlling connection of a battery output to a load and a detector for detecting a resistance at a load output terminal. A first comparator compares the detected resistance to a predetermined maximum value, and a second comparator compares the detected resistance to a predetermined minimum value. If the detected resistance is in the range between the minimum and maximum values, a control signal is produced to enable connection of the battery output to the load. If the detected resistance is outside the range, the switch is disabled and no current can flow to the load.

公开(公告)号：BR9911216A

公开(公告)日：2001-08-07

申请号：BR9911216

申请日：1999-06-14

Applicant: QUALCOMM INC

Inventor： PETERZELL PAUL E ,  ROSS DAVID J ,  CHOW MARLAND

IPC: H02J7/00 ,  H04M1/02 ,  H04M1/72

Abstract: A portable phone has an outer casing with opposite upper and lower walls, one of the walls having an opening for access to the interior of the casing, and a lid removably mounted in the opening for normally closing the opening. A main circuit board is mounted in the outer casing, with a plurality of phone components mounted on the circuit board. A predetermined region of the board aligned with the opening is left exposed or empty of components, and forms a recess for receiving a battery. The battery receiving recess has contact pads, and a battery is removably engaged in the recess with battery contacts engaging the contact pads in the recess, whereby the battery can be removed and replaced via the opening after opening the lid.

公开(公告)号：AU3299799A

公开(公告)日：1999-09-06

申请号：AU3299799

申请日：1999-02-18

Applicant: QUALCOMM INC

Inventor： CHOW MARLAND ,  ROSS DAVID J ,  PETERZELL PAUL E ,  ABERLE TY ,  MONSON RODNEY H

IPC: H04B1/38 ,  H04M1/02 ,  H04M1/72

公开(公告)号：SI0706730T1

公开(公告)日：1998-12-31

申请号：SI9530086

申请日：1995-04-28

Applicant: QUALCOMM INC

Inventor： WILSON NATHANIEL B ,  BLACK PETER J ,  PETERZELL PAUL E

IPC: H03D3/00 ,  H03G3/30

公开(公告)号：ES2115380T3

公开(公告)日：1998-06-16

申请号：ES95917193

申请日：1995-04-28

Applicant: QUALCOMM INC

Inventor： WILSON NATHANIEL B ,  BLACK PETER J ,  PETERZELL PAUL E

IPC: H03D3/00 ,  H03D3/24 ,  H03G3/20 ,  H03D7/16 ,  H03G3/30 ,  H04B1/30 ,  H04L27/14 ,  H04L27/22

Abstract: An automatic gain control (AGC) and D.C. offset correction method and apparatus for controlling signal power of a received RF signal within a dual mode quadrature receiver is disclosed herein. In a preferred implementation the automatic gain control apparatus may be adjusted to provide a desired control response to various fading characteristics of a received FM, FSK, GMSK, QPSK, or BPSK signal. The AGC apparatus includes an adjustable gain amplifier having an input port for receiving an input signal, a control port for receiving a gain control signal, and an output port for providing an output signal. A quadrature downconverter coupled to the output port serves to translate the frequency of the output signal to a baseband frequency, thereby producing baseband signals. In a preferred implementation the downconverter is operative to map the carrier frequency of the output signal to a baseband frequency offset by a predetermined margin from D.C. Two high gain active lowpass filters provide out-of-band signal rejection for the baseband signals. A D.C. feedthrough suppression loop, disposed to receive said baseband signal, suppresses D.C. offsets produced by the downconverter and lowpass filters, hence providing a compensated baseband signal. The AGC apparatus is further disposed to generate a received power signal based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and produces the gain control signal by integrating or by refraining from integration based on values of the reference, received power signal, and gain control signals, thereby extending the usable dynamic range of the receiver for FM mode.