Abstract:
A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer (1) of semiconductor material, cavities (8; 19) delimiting structures (7; 17) of semiconductor material; thinning out the structures (7) through a thermal process; and completely oxidizing the structures (7).
Abstract:
Method for manufacturing electromagnetic radiation reflecting devices (23), said method comprising the steps of:
a) providing a silicon substrate (1) defined by at least one first free surface (2), b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface (2), c)etching the region of the free surface (2) by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface (16) of the substrate inclined in relation to said first surface. Furthermore, said first free surface (2) is parallel to the crystalline planes {110} of silicon substrate and said step c) comprises a progressing step of the anisotropic agent such that the second free surface (16) resulting from the etching step is parallel to the planes {100} of said substrate (1).
Abstract:
The integrated device (1) for microfluid thermoregulation comprises a semiconductor material body (2) having a surface (3); a plurality of buried channels (4) extending in the semiconductor material body (2) at a distance from the surface (3) of the semiconductor material body (2); inlet and outlet ports (5a, 5b) extending from the surface (3) of the semiconductor material body (2) as far as the ends (4a, 4b) of the buried channels (4) and being in fluid connection with the buried channels; and heating elements (10) on the semiconductor material body. Temperature sensors (15) are arranged between the heating elements (10) above the surface (3) of the semiconductor material body (2).
Abstract:
The method comprises the steps of: on a wafer (1) of monocrystalline semiconductor material, forming a hard mask (9) of an oxidation-resistant material, defining first protective regions (7) covering first portions (21) of the wafer (1); excavating the second portions (8'') of the wafer (1), forming initial trenches (10) extending between the first portions (8') of the wafer (1); thermally oxidating the wafer (1), forming a sacrificial oxide layer (14) extending at the lateral and base walls (10a, 10b) of the initial trenches (10), below the first protective regions (7); and wet etching the wafer (1), to completely remove the sacrificial oxide layer (14). Thereby, intermediate trenches (10') are formed, the lateral walls (10a') of which are recessed with respect to the first protective regions (7). Subsequently, a second oxide layer 11 is formed inside the intermediate trenches 10'; a second silicon nitride layer 12 is deposited; final trenches 16 are produced; a buried oxide region 22 is formed, and finally an epitaxial layer 23 is grown.
Abstract:
The method comprises the steps of: on a monocrystalline silicon wafer (1), forming protective regions (30) having the shape of an overturned U, made of an oxidation resistant material, covering first wafer portions (18); forming deep trenches (16) in the wafer which extend between, and laterally delimit the first wafer portions (18); completely oxidising the first wafer portions except their upper areas (21) which are covered by the protective regions, forming at least one continuous region (22) of covered oxide that superimposed by the non-oxidised upper portions (21); removing the protective regions (30); and epitaxially growing a crystalline semiconductor material layer (23) from the non-oxidised upper portions.